About 11 months ago, I wrote a piece titled “Money for data and your MEMS for free.” In that, I took on the thinking that TSMC is just going to ride into town, fab trillions of IoT sensors, and they all will be 2.6 cents ten years from now. Good headline, but the technology and economics are not that simple. This may be the semiconductor version of putting a man on the moon by 1970, but instead of one big rocket, we are building little things.
My view is three basic classes of “sensors” are likely to emerge on that 10-year horizon: the RFID-like passive tag at something around 2 cents, the mass-market accelerometer at maybe 50 cents, and the high-performance RF switch or spectrometer at $5. The first category will have everything from printed electronics to integrated CMOS tags from TSMC and others. The last category will remain territory for boutique MEMS fabs.
In the middle, there is room for debate and innovation.
I also noted recent discussion in our “Inside the iPhone 6s” thread. In that, our Tom Simon noted two different accelerometers from different suppliers on the BOM, and reader @nick_rb replied that one is a high precision, higher power 6-axis IMU (Invensense), and the other a basic 3-axis unit (Bosch). That is a very revealing fact about the state of MEMS sensors today: performance isn’t cheap, in either BOM cost or power.
The problem in the middle, and the biggest barrier to the TSMC vision, is the MEMS process itself and the integration challenges with CMOS logic. Coventor draws on the Chipworks teardown of the Apple Watch for a compelling example:
The Apple S1 is not just a chip. It is a system on module, with 30 die integrated in a single package. It has everything from the processor to the touch sensor to the Bluetooth and Wi-Fi controller and more. Everything, that is, except the MEMS components, a 6-axis ST motion sensor and a Knowles microphone.
Ample IoT opportunity exists, even when one tones down the hype of trillions of units. Better CMOS process integration would certainly create more design flexibility and open the potential for lower costs – at least for some MEMS sensor types. The question: how do we do this? The current CMOS and MEMS processes are at direct odds, from EDA tools and design rules to physical construction:
Coventor has collaborated with X-FAB to launch MEMS+ 6.0, the latest version of their MEMS EDA tool with all new capability for process design kits (MEMS PDKs). Rather than leaving MEMS design up to handcrafted microbrewing, the idea centers on a library of simplified high-order finite elements for faster simulation and smoother exporting into a CMOS EDA flow. By enforcing process constraints and design rules, the generic MEMS library components can be customized to meet many requirements without breaking everything.
MEMS+ 6.0 also improves the flow for the experienced MEMS designer. Its model reduction capability exports in MathWorks Simulink or Verilog-A, with automated reduced-order models providing higher accuracy and faster results. These models abstract design details, so they can be provided to third parties without exposing the secret sauce – again, critical for integration. There is also a notion of design hierarchy and sub-structures for improved schematic reuse and faster model changes.
The resulting EDA flow with MEMS+ 6.0 looks like this, using Cadence as an example:
Coventor has done two things with MEMS+ 6.0. They have lowered the traditional wall between the MEMS designer working in the microstructure domain and the CMOS designer working in a typical mixed-signal EDA flow. If we are going to create and build more IoT devices quickly, this is a big step – similar to the improvements in mixed-signal EDA tools just a few years ago.
The second has bigger implications. CMOS foundries can now offer a level of mainstream MEMS fab capability, reliably modeled and compatible with their flow. MEMS purists will probably point out this won’t tackle every MEMS sensor type or precision requirements, and I don’t expect it to put the boutiques out of business. TSMC is probably in the “see, I told you this was happening” camp. I’d go back to something I’ve said before: we don’t have 2 cent MCUs for a reason. Never confuse technology with economic feasibility, especially for consumer space.
This type of development could open up what I’ll call the sub-$1 integrated MEMS segment for now. One aspect to watch is who else adopts Coventor MEMS+ 6.0 for on what process. (From the announced partnership, I’m assuming we can count X-FAB in.) TSMC, Intel, and others are pushing the big wafer start and advanced node story for digital SoC design. Wearable and IoT parts may very well be built on a generation or two back – remember, ARM recently came out with a strong focus on TSMC 55ULP.
It is good to see energy applied toward solving this for MEMS and the IoT. Full press release:Share this post via: