Challenges in Battery Design and Integration

Challenges in Battery Design and Integration
by Admin on 07-26-2021 at 12:00 am

LIVE WEBINAR | 26 JULY 2021 | 01:00 PM EST

This session focuses on initial system-level simulation and integration with BiW, pack thermal simulation, controller

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Development of Motor Design and Integration

Development of Motor Design and Integration
by Admin on 07-21-2021 at 12:00 am

LIVE WEBINAR | 21 JULY 2021 | 01:00 PM EST

Learn how Simcenter supports the development of electric motors and inverters in this webinar series – Addressing the engineering challenges of electrification.

This session explores how to frontload your development by sizing a motor appropriately to balance performance

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Process Integration and Design Optimization for Computational Fluid Dynamics Problems Using Ansys optiSLang

Process Integration and Design Optimization for Computational Fluid Dynamics Problems Using Ansys optiSLang
by Admin on 06-17-2021 at 12:00 am

Learn how to apply process integration and design optimization principles to computational fluid dynamics problems.

Time:
June 17, 2021
10 AM EDT / 3 PM BST / 7:30 PM IST

Venue:
Online

In this webinar we will show how the power of interactive visualization and artificial intelligence (AI) technologies enables engineers and designers… Read More


SoC Integration using IP Lifecycle Management Methodology

SoC Integration using IP Lifecycle Management Methodology
by Daniel Payne on 01-27-2017 at 12:00 pm

Small EDA companies often focus on a single point tool and then gradually over time they add new, complementary tools to start creating more of a sub-flow to help you get that next SoC project out on time. The most astute EDA companies often choose to partner with other like-minded companies to create tools that work together well,… Read More


Getting out of DIY mode for virtual prototypes

Getting out of DIY mode for virtual prototypes
by Don Dingee on 09-26-2016 at 4:00 pm

Virtual prototyping has, inexplicably, been largely a DIY thing so far. Tools and models have come from different sources with different approaches, and it has been up to the software development team to do the integration step and cobble together a toolchain and methodology that fits with their development effort.

That integration… Read More


DRC Concept for IP Qualification and SoC Integration

DRC Concept for IP Qualification and SoC Integration
by Pawan Fangaria on 05-30-2016 at 7:00 am

In the history of semiconductor design and manufacturing, the age-old concept of DRC rule-deck qualification for handshake between design and manufacturing still applies strongly to produce working silicon. In fact, DRC clean GDSII works as the de facto golden gate between a design and a foundry for manufacturing the chip for… Read More


Tcl scripts and managing messages in ASIC & FPGA debug

Tcl scripts and managing messages in ASIC & FPGA debug
by Don Dingee on 04-27-2016 at 4:00 pm

Our previous Blue Pearl post looked at the breadth of contextual visualization capability in the GUI to speed up debug. Two other important aspects of the ASIC & FPGA pre-synthesis workflow are automating analysis with scripts and managing the stream of messages produced. Let’s look at these aspects… Read More


Fit-for-purpose IoT ASICs are about more than cost

Fit-for-purpose IoT ASICs are about more than cost
by Don Dingee on 04-06-2016 at 4:00 pm

We’ve been saying for a while that it looks like there is a resurgence in design starts for ASICs targeting the IoT. A recent webinar featuring speakers from ARM and Open Silicon (and moderated by Daniel Nenni) affirms this trend, and provides some insight on how these designs may differ from typical microcontrollers.

One of my first… Read More


The (not so) Easy Life of an SOC Design Integrator

The (not so) Easy Life of an SOC Design Integrator
by Tom Simon on 02-16-2016 at 3:00 pm

How can large SOC projects effectively integrate sub blocks and IP into a stable version for release or internal development? The person responsible for integrating SOC sub blocks into a validated configuration for release has a difficult task. Usually there are many sub-blocks, each undergoing their own development. There… Read More