Building a custom chip for edge computing applications can be quite daunting. For starters, there is very little power available at the edge, so energy efficiency will be top of mind. The whole point of edge processing is to off-load the time-consuming and costly process of sending data to the cloud, so substantial processing capability will be needed to make the whole thing worthwhile. Being outside the firewall of major cloud infrastructure means security will be a major requirement as well. Pretty much every application will demand some form of AI, so that will need to be on board, too. Ready to balance all these requirements? Have a headache yet? If you want to understand how to build a sophisticated edge processing ASIC FAST and EASY with Sondrel, read on.
I’ve previously discussed Sondrel’s platform-based approach to ASIC design. The company offers an innovative family of reference designs called Architecting the Future™. What I’ll explore here is a recently announced addition to the family that delivers significant capability in a configurable package. The time saving and risk reduction are substantial. This powerful, quad core IP platform is called the SFA 200. Let’s look under the hood.
The general application area is remote gathering and processing of video and data at the edge. Secure transmission of the data is also a requirement for this type of application. Examples include smart metering, smart homes, smart factories, voice-controlled devices, and infotainment.
The platform delivers a CPU cluster for general purpose processing consisting of Arm® CPU cores, nominally 4, providing a powerful “punch” by using either an Arm A53 or A55 with 9 – 10 GMIPS at 1 GHz nominal.
The platform also contains an AI cluster for neural network tasks with supporting memory and interfaces. This portion is based on either Arm Ethos cores or DSP-AI cores providing nominally 4 TOPS performance. Since AI algorithms often comprise the “secret sauce” for a particular design, custom AI cores can also be integrated.
Chip-level integration is accomplished with a composable network on chip system fabric, offering a multi-path, multi-width (64b to 512b) data path at a nominal 800MHz transmission rate. The platform offers multiple hooks to achieve performance optimization. Items such as data flow tuning for the application, quality of service arbitration and scheduling are all supported. A system management subsystem handles the configuration, start-up, and operation modes of the full chip, along with active power management for low-power or battery powered applications.
A fully integrated security subsystem uses either an Arm A53 or M33, based on application requirements, to provide activity/intrusion monitoring, software signing and crypto support, including authentication to address hacking. The security subsystem also includes watchman behavior tracking and deviation detection.
Putting it All Together
All the functions outlined here are complex subsystems requiring substantial engineering effort to design, verify and manufacture. The “out of the box” set of proven capabilities from Sondrel will substantially reduce your next design effort. All you need to do is add your own differentiating IP or application-specific, off-the-shelf IP to create the final design.
The result is a low risk, faster time to market. Sondrel estimates this approach can reduce design costs by up to 30%. If you want to learn more about the platform, including block diagrams for the various subsystems you can find that in the recent press release here. Now you know how to build a sophisticated edge processing ASIC FAST and EASY with Sondrel.Share this post via: