AI Booming is Fueling Interface IP 17% YoY Growth

AI Booming is Fueling Interface IP 17% YoY Growth
by Eric Esteve on 07-11-2024 at 6:00 am

IF 2018 2027no$

AI explosion is clearly driving semi-industry since 2020. AI processing, based on GPU, need to be as powerful as possible, but a system will reach optimum only if it can rely on top interconnects. The various sub-system parts (memory, processor, co-processor, network) need to be connected with interface links with ever more bandwidth… Read More


proteanTecs at the 2024 Design Automation Conference

proteanTecs at the 2024 Design Automation Conference
by Daniel Nenni on 06-20-2024 at 4:00 pm

DAC 2024 Banner

Meet with proteanTecs at DAC. Explore our full set of health and performance monitoring solutions. We’ll be showcasing our latest products and solutions, and we’d love to connect while you’re there. Visit booth #2417 to explore our health and performance monitoring solutions.

Also – Don’t miss out… Read More


Blue Pearl Software at the 2024 Design Automation Conference

Blue Pearl Software at the 2024 Design Automation Conference
by Daniel Nenni on 06-19-2024 at 6:00 pm

DAC 2024 Banner

Twenty years ago, Blue Pearl showcased its first-generation ASIC and FPGA static verification solution at the 2004 Design Automation Conference. If you are attending DAC 2024, stop by booth 1439 and see how 20 years of product development on the Visual Verification Suite has made chip design much more efficient.

The Visual Verification… Read More


CEO Interview: Dieter Therssen of Sigasi

CEO Interview: Dieter Therssen of Sigasi
by Daniel Nenni on 06-07-2024 at 6:00 am

Dieter Therssen

Dieter Therssen obtained his master’s degree in Electronics Engineering from KU Leuven in 1987. He started his career as a hardware design engineer, using IMEC’s visionary tools and design methodologies in the early days of silicon integration.

Since then, Dieter developed his career across many digital technologies,… Read More


CEO Interview: Larry Zu of Sarcina Technology

CEO Interview: Larry Zu of Sarcina Technology
by Daniel Nenni on 03-01-2024 at 6:00 am

Larry Zu Photo 091516

Larry has grown Sarcina from designing semiconductor packages for a few small companies, to doing package designs for top semiconductor companies around the world. From 2014 to 2018, Larry led the expansion of Sarcina beyond package design into final test and wafer sort hardware and software development.

Larry is a semiconductor… Read More


Transformative Year for Sondrel

Transformative Year for Sondrel
by Daniel Nenni on 01-18-2024 at 6:00 am

Happy,New,Year,2023,,Keep,Fighting,Together,,Silhouette,Of,2023

This is our third year working with Sondrel and it has been a great experience. I have always been fascinated with the ASIC business and put a full chapter about it in our first book “Fabless: The Transformation of the Semiconductor industry.” Companies like Sondrel enabled our move to the fabless model and now they … Read More


Uniquely Understanding Challenges of Chip Design and Verification

Uniquely Understanding Challenges of Chip Design and Verification
by Daniel Nenni on 11-14-2023 at 6:00 am

Jean Marie Brunet (1)

Jean-Marie Brunet is Vice President and General Manager of Siemens Hardware-Assisted Verification. He and I spoke recently about how different his hardware group is from the rest of the software-centric EDA product space and why a hardware-oriented EDA vendor like Siemens fully understands the challenges of the chip design… Read More


Interface IP in 2022: 22% YoY growth still data-centric driven

Interface IP in 2022: 22% YoY growth still data-centric driven
by Eric Esteve on 09-04-2023 at 10:00 am

IF 2018 2027no$

We have shown in the “Design IP Report” 2022 that the market share of the wired Interface IP category is a growing part of the total IP, and that this trend is confirmed year after year. The interface IP category has moved from 18% share in 2017 to 25% in 2022.

During the 2010-decade, smartphone was the strong driver for the IP industry,… Read More


Using Linting to Write Error-Free Testbench Code

Using Linting to Write Error-Free Testbench Code
by Daniel Nenni on 08-23-2023 at 10:00 am

AMIQ EDA Design and Verification

In my job, I have the privilege to talk to hundreds of interesting companies in many areas of semiconductor development. One of the most fun things for me is interviewing customers—hands-on users—of specific electronic design (EDA) tools and chip technologies. Cristian Amitroaie, CEO of AMIQ EDA, has been very helpful in introducing… Read More