CEO Interview: Robert Blake of Achronix

CEO Interview: Robert Blake of Achronix
by Daniel Nenni on 05-25-2020 at 10:00 am

Robert Blake Achronix CEO SemiWiki

Achronix came to SemiWiki in 2017 and we added a chapter on the history of Achronix in our update version of “Fabless: The Transformation of the Semiconductor Industry”. So yes we know quite a bit about Achronix and the FPGA business so it was a pleasure to do a CEO Q&A with Robert Blake. First lets take a look at his … Read More


Reducing Your ASIC Production Risk!

Reducing Your ASIC Production Risk!
by Daniel Nenni on 03-23-2020 at 10:00 am

Delta Managing the ASIC Supply Chain

Managing the ASIC manufacturing is one of the biggest challenges of chip projects.

Building an ASIC supply chain requires specific expertise. Throughout the process you’ll be confronted with hundreds of decisions that will require specific knowledge in order to be addressed correctly, avoid costly mistakes and lose time. … Read More


Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards

Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards
by Admin on 03-17-2020 at 11:00 am

img 5e6cb3ae36260

Tue, Mar 17, 2020 11:00 AM – 12:00 PM MDT

** Work email address required**
ABSTRACT
Presently, emulation and FPGA-based prototyping are essential verification and validation techniques for a SoC, ASIC designs and become irreplaceable in pre-silicon verification of Deep Learning Accelerator designs. Challenges of
Read More

Where has the ASIC Business Gone?

Where has the ASIC Business Gone?
by Daniel Nenni on 11-25-2019 at 10:00 am

As the traditional ASIC business disappears before our eyes with the recent divestitures and acquisitions, I have been asking questions amongst the fabless semiconductor ecosystem and am getting few answers.

Who or what is going to step in to enable start-ups and new to silicon systems companies with application specific chips?Read More


Is the ASIC Business Dead?

Is the ASIC Business Dead?
by Daniel Nenni on 11-11-2019 at 10:00 am

We covered the ASIC business in Chapter 2 of our book “Fabless: The Transformation of the Semiconductor Industry” using VLSI Technology and eSilicon as shining examples. Neither of which now exist. The ASIC business model was a critical steppingstone in the transformation of the semiconductor industry. Many systems companies… Read More


WEBINAR: Which ASIC Manufacturing Method is Right for You?

WEBINAR: Which ASIC Manufacturing Method is Right for You?
by Daniel Nenni on 11-11-2019 at 6:00 am

Minimizing ASIC production costs is the goal of every company. The problem is that this requires extensive knowledge. You must understand the technical intricacies and the financial implications of multiple activities like wafer production, packaging and QA activities such as electrical tests.

Generally, the more your company… Read More


WEBINAR: How ASIC/SoC Rapid Prototyping Solutions Can Help You!

WEBINAR: How ASIC/SoC Rapid Prototyping Solutions Can Help You!
by Daniel Nenni on 09-17-2019 at 10:00 am

Today’s off-the-shelf FPGA based prototyping systems have established their value in every stage of the application specific integrated circuit (ASIC) and system-on-chip (SoC) design flow. Moving beyond traditional applications such as in-circuit testing and early software development, this technology has expanded … Read More


eFPGA – What a great idea! But I have no idea how I’d use it!

eFPGA – What a great idea! But I have no idea how I’d use it!
by Daniel Nenni on 08-05-2019 at 10:00 am

eFPGA stands for embedded Field Programmable Grid Arrays.  An eFPGA is a programmable device like an FPGA but rather than being sold as a completed chip it is licensed as a semiconductor IP block. ASIC designers can license this IP and embed it into their own chips adding the flexibility of programmability at an incremental cost.… Read More


Webinar: SystemVerilog Strategies

Webinar: SystemVerilog Strategies
by Daniel Payne on 07-24-2019 at 11:30 am

Hosted by Oasis Sales and Trilogic, Inc.

Overview

SystemVerilog (SV) has become the basis for verifying FPGA and ASIC designs.  As the complexity of SOC designs grows, advanced verification methodology concepts such as: Constrained Random Stimulus, Functional Coverage, and Test Environment Reuse are needed at the system … Read More


Selecting an ASIC package

Selecting an ASIC package
by Daniel Nenni on 05-29-2019 at 10:00 am

Semiconductor chip package technologies have evolved throughout the years to the point where hundreds of package types are available today. 

Most applications will require the more general, single-element packaging for integrated circuits and the other components such as resistors, capacitators, antenna etc. However,… Read More