As I mentioned in my blog GlobalFoundries Update 2012, the GFI people are on the move at DAC 2012. Here is a little more detail on the up and coming AMS and Digital reference flows for 28nm and 20nm.
GLOBALFOUNDRIES will describe the methodology and collateral available in the GLOBALFOUNDRIES SignOff Digital Flow. This flow comes in different variants for different technology nodes. It is silicon validated ,is a fully executable flow and is designed to be modular and to provide quick setup for customers who wish to design to GLOBALFOUNDRIES process. It addresses critical design concerns and provides detailed and accessible methodology to address the challenges. The presentation will emphasize the 28nm flow and introduce the 20m variant of the flow.
Particular attention will be paid to the Cadence based Digital flow which is derived from a Silicon validated design. The design consisted of multiple cores designed with different experiments in low power, DFM, etc.
GLOBALFOUNDRIES will describe the methodology and collateral available in the GLOBALFOUNDRIES Production AMS flow. The flow was used to design a mixed signal chip incorporating a 3Ghz PLL that was manufactured in GLOBALFOUNDRIES 28SLP process in Fab 1 in Dresden, Germany. The manufactured chip has been tested and used to validate the flow. The presentation will describe how the IP design is captured in the collateral available from GLOBALFOUNDRIES. The results of silicon testing will be presented and guidelines to successful AMS design for GLOBALFOUNDRIES process. The presentation will emphasize the 28nm design node but will also introduce the 20nm variant which will also undergo Silicon validation.
The flow itself is a mixed vendor flow, constructed as a series of Modules that provide detailed setup description for a user new to the 28nm GLOBALFOUNDRIES process. The presentation will describe the detailed documentation of the step by step design tasks; Modular and reproduceable LVS/PEX flows with all the hooks for handling Layout Dependent effects are included. Tutorial introduction to the use of GLOBALFOUNDRIES PCells is also demonstrated.
The 20nm flow addresses yet more design challenges, providing step by step instructions and guidance for designing in a double patterned environment. While the multi vendor RTL2GDSII flows from GLOBALFOUNDRIES handle coloring mostly transparent to the user, the custom flows provide more hooks for the designer to take advantage of the features available with the GLOBALFOUNDRIES PDK. The flows developed by GLOBALFOUNDRIES in collaboration with EDA partners address the challenges introduced by double patterning.
Click on over to register or check-in at booth #303:
[TABLE] cellspacing=”3″
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| colspan=”5″ | June, 2012
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| style=”width: 10px” | 4
| style=”width: 34px” | Mon
| style=”width: 87px” | 9am – 10am
| Cadence Seminar: Topic TBD
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| 10am – 11am
| FoundryView Customer Testing
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| 10am – 11am
| GLOBALFOUNDRIES Seminar: PDKs for Advanced Process Nodes
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| 11am – 12pm
| FoundryView Customer Testing
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| 11am – 12pm
| ARM Seminar: A9 POP ON GLOBALFOUNDRIES 28SLP
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| 12pm – 1pm
| GLOBALFOUNDRIES Seminar: Production AMS Design Flow Update
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| 1pm – 2pm
| Catena Seminar: WiFi RF Solutions and Platform Development on GLOBALFOUNDRIES Low Power Processes
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| 2pm – 3pm
| FoundryView Customer Testing
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| 2pm – 3pm
| Mentor Seminar: GLOBALFOUNDRIES and Mentor Calibre–Getting to Silicon Faster
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| 3pm – 4pm
| FoundryView Customer Testing
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| 3pm – 4pm
| GLOBALFOUNDRIES Seminar: Beyond 28nm: New Frontiers and Innovations in Design For Manufacturability at the Limits of the Scaling Roadmap
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| 4pm – 5pm
| Synopsys Seminar: Topic TBD
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| 5pm – 6pm
| GLOBALFOUNDRIES Seminar: 28nm and the Runway to 20nm
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| 5
| Tue
| 10am – 11am
| FoundryView Customer Testing
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| 10am – 11am
| Synopsys Seminar: Topic TBD
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| 11am – 12pm
| FoundryView Customer Testing
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| 11am – 12pm
| GLOBALFOUNDRIES Seminar: PDKs for Advanced Process Nodes
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| 12pm – 1pm
| ChipEstimate Seminar: Topic TBD
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| 1pm – 2pm
| Seminar TBD
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| 2pm – 3pm
| FoundryView Customer Testing
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| 2pm – 3pm
| GLOBALFOUNDRIES Seminar: Beyond 28nm: New Frontiers and Innovations in Design For Manufacturability at the Limits of the Scaling Roadmap
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| 3pm – 4pm
| FoundryView Customer Testing
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| 3pm – 4pm
| Cadence Seminar: Topic TBD
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| 4pm – 5pm
| GLOBALFOUNDRIES Seminar: Design Enablement: Digital Sign-Off Flow Update
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| 5pm – 6pm
| GLOBALFOUNDRIES Seminar: RF CMOS for Wireless Applications
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| 6
| Wed
| 9am – 10am
| Mentor Seminar: GLOBALFOUNDRIES and Mentor Calibre–Getting to Silicon Faster
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| 10am – 11am
| FoundryView Customer Testing
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|-
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|
| 10am – 11am
| GLOBALFOUNDRIES Seminar: Beyond 28nm: New Frontiers and Innovations in Design For Manufacturability at the Limits of the Scaling Roadmap
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|-
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| 11am – 12pm
| FoundryView Customer Testing
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| 12pm – 1pm
| ARM Seminar: Topic TBD
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| 1pm – 2pm
| Synopsys Seminar: Topic TBD
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| 2pm – 3pm
| FoundryView Customer Testing
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| 2pm – 3pm
| Cadence Seminar: Topic TBD
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| 3pm – 4pm
| FoundryView Customer Testing
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| 3pm – 4pm
| GLOBALFOUNDRIES Seminar: PDKs for Advanced Process Nodes
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