Just as important as block RAMs, IO and DSP48’s is what interconnect or fabric is going to be used when considering SoC FPGA designs. I think Xilinx has found the winning combination. What is paramount to the new SoC FPGA methodologies is not only the challenge of moving huge amounts of data around; we are now to consider data… Read More
Arm targets the agentic AI era with new edge, cloud and robotics platformsArm is expanding its computing platform for an…Read More
Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AIInstead of tweaking existing designs, VSORA built an…Read More
UWB Without the Integration Headache: Ceva and LG Bring Precision to More ChipsCeva and LG Electronics have joined forces to…Read More
PCIe 7 Switch IP with Time Division Multiplexing: Powering the Next Generation of AI ConnectivityBy Tim Messegee, Senior Director of Solutions Marketing…Read More
Semiconductor Engineering Has a State-Continuity ProblemProduct realization depends not only on reaching the…Read MoreScan the horizon, P1687 takes us higher
The tech standards cycle almost always goes like this: Problems or limits develop with the existing way of doing things. Innovators attempt to engineer solutions, usually many of them. Chaos ensues when customers figure out nothing new works with anything else. Competitors sit down and agree on a specification where things work… Read More
Pre-verified, Integrated Sensor IP Subsystem?
Last year, I said that the launch of ARC based complete sound system IP by Synopsys ring the bell for the opening of a new IP market segment, the “Subsystem IP”. This week, Synopsys has announced the availability of the DesignWare® Sensor IP Subsystem, a complete and integrated hardware and software solution for sensor control applications.… Read More
IP: Make or Buy?
A couple of weekends ago I moderated a panel session for the Chinese American Semiconductor Professional Association. No, I had no idea such an organization existed either (at least partially because I’m not Chinese). Dan Nenni was meant to be doing it but he went off to Las Vegas, so I ended up getting the job. On a Saturday … Read More
AMS IC Design at SilabTech
Through my contacts at SemiWiki I was introduced to a mixed signal IP company named SilabTech, and then decided to interview the founder and CEO, Sujoy Chakravarty.
Sujoy Chakravarty, CEO and Founder
… Read More
Schematic Capture and SPICE in the Cloud
A SemiWiki member mentioned CircuitLaba few months back so I took a look at it today and share my first impressions.… Read More
Power and Reliability Sign-off – A must, but how?
At the onset of SoCs with multiple functionalities being packed together at the helm of technologies to improve upon performance and area; power, which was earlier neglected, has become critical and needs special attention in designing SoCs. And there comes reliability considerations as well due to multiple electrical and … Read More
Premier Gathering for Semiconductor Professionals!
The US Executive Forum hosted by the Global Semiconductor Alliance is coming up on September 25th at the beautiful Rosewood Sand Hill Hotel in Menlo Park. Over 150 executives from the semiconductor and technology industry will attend creating a truly unique opportunity to listen to some of the world’s foremost speakers… Read More
Lynn Conway’s Story
If you are my age, you know that the most influential book in that era on VLSI design was Carver Mead and Lynn Conway’s textbook, blah VLSI blah. Nobody can remember exactly what its title was, it was just referred to as Mead and Conway. In my opinion it was the most influential book on semiconductor design ever. It opened up VLSI… Read More
What Applications Implement Best with High Level Synthesis?
RTL coding using languages like Verilog and VHDL have been around since the 1980’s and for almost as long a time we’ve been hearing about High Level Synthesis, or HLS that allows an SoC designer to code above the RTL level where you code at the algorithm level. The most popular HLS languages today are C, C++ and SystemC.… Read More


ASML and TSMC’s 12-Inch Photomask Initiative: Technical Significance