We have seen methodology shifts in our industry; emulation is going through a fundamental shift in usage, scope of the tasks, deployment, enterprise level and vertical market focus.… Read More
Listening to Veloce Customers: Emulation is Thriving
Should the US Government Invest in Intel?“Most companies don’t die because they are wrong;…Read More
PDF Solutions and the Value of Fearless CreativityPDF Solutions has been around for over 30…Read More
EDA Powered by Machine Learning panel, 1-on-1 demos, and more!
DAC is upon us again! The Design Automation Conference holds special meaning to me as it was the first technical conference I attended as a semiconductor professional, or professional anything for that matter. That was 33 years ago and I have not missed one since. This year my wife and I both will be walking the DAC floor and it would… Read More
Webinar: How RTL Design Restructuring Helps Meet PPA
To paraphrase an Austen line, it is a truth universally acknowledged that implementation, power intent and design hierarchy don’t always align very well. Hierarchy is an artifact of legacy structure, reuse and division of labor, perhaps well-structured piecewise for other designs but not necessarily so for the design you now… Read More
AI Being Used from Probing to Simulation
The 54th annual DAC event is fast approaching, so I hope to see many of you in Austin on June 18-21. The phrases Machine Learning and AI are growing in all areas of software, so I’m glad to see it appearing in more EDA tool offerings over the past year or so. One company that I plan to visit at DAC is Platform Design Automation because… Read More
ClioSoft & DAC : Booth 613 – Collaborative Design, Design Data & IP Management and Design Reuse
It’s time again to gather for the next Design Automation Conference (DAC). This will be the 54[SUP]th[/SUP] such meeting and this year it runs from June 19[SUP]th[/SUP] – 21[SUP]st[/SUP] in the Live Music Capital of the World, Austin Texas. Put on your best duds, boots and cowboy hat and make your way to Texas.
While you are there … Read More
Webinar: Achieving Very High Bandwidth Chip-to-Chip Communication with the Interlaken Interface Protocol
Open Silicon will hold this webinar on June 13th at 8 am PDT (or 5 pm CE) to describe their Interlaken IP core, and how to achieve very high bandwidth C2C communication in various networking applications. To be more specific, the Interlaken protocol can be used to support Packet Processing/NPU, Traffic Management, Switch Fabric,… Read More
Tools for Advanced Packaging Design Follow Moore’s Law, Too!
There is an emerging set of advanced packaging technologies that enables unique product designs, with the capability to integrate multiple die, from potentially heterogeneous technologies. These “system-in-package” (SiP) offerings provide architects with the opportunity to optimize product performance, power, cost,… Read More
An InFormal Chat
Any sufficiently advanced technology is indistinguishable from magic, as the saying goes. Which is all very well when the purpose is entertainment or serving the arcane skills of a select priesthood, but it’s not a good way to grow a market. Then you want to dispel the magic aura, make the basic mechanics more accessible to a wider… Read More
Margin Call
A year ago, I wrote about Ansys’ intro of Big Data methods into the world of power integrity analysis. The motivation behind this advance was introduced in another blog, questioning how far margin-based approaches to complex multi-dimensional analyses could go. An accurate analysis of power integrity in a complex chip should… Read More
Memory drives semiconductor boom in 2017
The semiconductor market was down 0.4% in first quarter 2017 from 4Q 2016 and up 18.1% from a year ago, according to World Semiconductor Trade Statistics (WSTS). The 0.4% decline in 1Q 2017 versus 4Q 2016 is strong compared to an average 4% decline from 4Q to 1Q over the previous five years. The relative strength in 1Q 2017 was driven… Read More
Intel’s Pearl Harbor Moment