Something New in Analog Test AutomationDigital design engineers have used DFT automation technologies…Read More
MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power EfficiencyMediaTek’s first chipset using 2nm technology expected in…Read More
Advancing Semiconductor Design: Intel's Foveros 2.5D Packaging TechnologyIn the rapidly evolving landscape of semiconductor manufacturing,…Read More
Synopsys Announces Expanding AI Capabilities and EDA AI LeadershipIn the fast-paced semiconductor industry Synopsys has redefined…Read More
Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICsAn engineering change order, or ECO in the…Read More
As someone who was heavily involved with rules for IP reuse for many years, I have a major sense of déja vu in writing again on the topic. But we (in SpyGlass) were primarily invested in atomic-level checks in RTL and gate-level designs. There’s a higher level of best practices in process we didn’t attempt to cover. ClioSoft just released… Read More
As any semiconductor process advances to the next generation or “node”, a sticky point is how to achieve the required higher resolution. As noted in another article [1], multipatterning (the required use of repeated patterning steps for a particular feature) has been practiced already for many years, and many have… Read More
Synopsys issued a press release this morning that has some important news – Synopsys Introduces New 64-bit ARC Processor IP Delivering Up to 3x Performance Increase for High-End Embedded Applications. At first glance, one could assume this is just an announcement for some new additions to the popular ARC processor family. While… Read More
As more security related capabilities are added in hardware it is changing the effort required to ensure that SoCs are not prone to attack. Hardware has the initial appeal of creating physical barriers to attack, yet it presents its own difficulties. For one thing, a flaw in a hardware security feature is much harder to fix in the … Read More
Synopsys just released a white paper, a backgrounder on CDC. You’ve read enough of what I’ve written on this topic that I don’t need to re-tread that path. However, this is tech so there’s always something new to talk about. This time I’ll cover a Synopsys survey update on numbers of clock domains in designs, also an update on ways to… Read More
Three weeks in to the current period of COVID-19 “social distancing” guidelines I have cancelled already-booked flights to Barcelona (cancellation of Mobile World Congress), Austin, Tex. (cancellation of SXSW), and London (cancelled company meeting). So it seemed logical that I’d cancel my flight to … Read More
Building a successful startup is hard, very hard. Creating a new category along the way is even more difficult. Those that succeed at both endeavors are quite rare. This is why an upcoming ESD Alliance event is a must-see in my view. The event is entitled “Jim Hogan and Methodics’ Simon Butler on Bootstrapping a Startup to Profitability… Read More
The negative impacts of the coronavirus, COVID-19, on the automotive industry continue to radiate out from the closure of factories and dealerships (for vehicle sales, while service operations continue) to employee furloughs and plunging stock prices. At the same time, the global pandemic has begun to undermine the investment… Read More
General Motors’ announced shut down of the Maven car sharing service was hardly a surprise, especially coming in the midst of the COVID-19 pandemic. By the time of its demise, Maven was only operating in four or five cities, down from a high of 17. The venture was doomed from the start, and its departure is a cautionary tale for
I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:
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Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet