EUV has long been an interesting story. We have written 200+ articles on EUV and they just keep on coming. Thankfully the premier lithography conference is right here in Silicon Valley. SPIE began in 1955 as the Society of Photographic Instrumentation Engineers, bringing together engineers using scientific cameras and high-speed… Read More
From Faster Proofs to Trusted Silicon with LUBIS EDALUBIS EDA is introducing FormalOS, a platform designed…Read More
Significant Performance Gains Reinforce Imagination’s GPU-First StrategyImagination Technologies’ first performance figures for its E-Series…Read MorePodcast EP373: The Impact of yieldHUB Live and Details of Upcoming Show Participation with Gillian O’Donnell
Daniel is joined by Gillian O’Donnell, Director of Growth at yieldHUB, the enterprise yield management platform trusted by semiconductor and photonics manufacturers worldwide. She leads business development, marketing, PR, and partnerships, with a particular focus on yieldHUB Live, the company’s real-time… Read More
TSMC 2026 OIP Ecosystem Forum Summary
TSMC’s 2026 Open Innovation Platform Forum presented artificial intelligence as the force reshaping semiconductor design. Its central argument is that faster chips will require progress across the whole system: logic, memory, packaging, interconnects, power delivery and design methods. TSMC places its partner ecosystem… Read More
CASPA CEO Summit and Why it Matters
It’s an honor to attend events like this as a guest, and even more so as a speaker. On Friday at 3:30 p.m., I’ll be moderating a panel with the CEOs of three of the hottest AI startups. I definitely have a few questions ready for them! My beautiful wife and I will also be at the banquet. I hope to see you there!
The CASPA CEO Summit arrives … Read More
Data Center Energy Trends Force a Rethink of Chip Power Delivery
Intel Foundry published a two article series on chip power delivery that are worth reading. Here is a quick summary:
Artificial intelligence is changing the requirements for semiconductor innovation. Faster transistors and denser packaging remain essential, but their benefits increasingly depend on another engineering… Read More
WEBINAR: The Convergence of Edge Accelerators
The rapid growth of AI at the edge is forcing SoC architects to rethink traditional processor designs. Dedicated NPUs deliver impressive performance for today’s models, but evolving AI workloads, increasing system complexity and growing pressure on power and silicon budgets are exposing the limitations of fixed-function… Read More
The silent killer of analog reliability: Why SPICE misses floating net
By Bhanu Pandey
The semiconductor industry is currently facing a significant challenge in functional verification. According to the most recent Wilson Research Group / Siemens EDA Functional Verification Study, first-silicon success rates have hit a historic low, with nearly 68% of designs requiring two or more spins. While… Read More
From Blueprint to Production: How Rambus Brings Commercial-Grade Caliptra Security to AI SoCs
Semiconductor designers today face a critical hurdle: how to smoothly transition from an open-source hardware blueprint to a commercially hardened, production-ready silicon implementation. As semiconductors play an increasingly essential role in powering the AI era, safeguarding these hardware foundations has become… Read More
From Cloud to Silicon: IC-Link and TSMC Open the Door
Access to advanced semiconductor technology involves much more than choosing a process node. Design teams also need computing capacity, compatible tools, secure technology access, and experienced support. IC-Link by imec’s expanded collaboration with TSMC addresses that combination, potentially making sophisticated… Read More
Wilson Survey Signals Need for New Understanding of Verification Success
Siemens has again sponsored a Wilson-led survey on the state of (functional) verification in the industry, and this time Harry Foster (Chief Scientist, Verification at Siemens) has condensed his major takeaways from the report. These are intriguing – particularly an apparent revolutionary change in first-silicon trends.… Read More





Hyper-NA EUV: The Next Frontier in Chipmaking Could Arrive in 2036