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FPGA Design/Verification: Randomization
May 12 @ 11:00 AM - 12:00 PM
|FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 3: Randomization – The Why, When, What & How (US)
Time: 11:00 AM – 12:00 PM PDT
Randomization is very important for modern verification. Still, very few designers apply randomization sufficiently in their testbenches. This means they are missing out on a very important method for finding potential bugs in their design, and as a result their products have significantly more undetected bugs. Randomization can be used in many ways, but it is of course also important to know when not to use it.
This presentation will show several levels of applying randomization, both with respect to the actual DUT and the randomization functionality available. The main principles shown are tool independent, but the new UVVM randomization functionality will be used as examples, thus also giving you a kick start using this great tool.
Espen Tallaksen, CEO of EmLogic
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