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Webinar: FPGA Design Verification in a Nutshell Part 1: Verification Planning (US)
Webinar: FPGA Design Verification in a Nutshell Part 1: Verification Planning (US)
Time: 11:00 AM - 12:00 PM (PDT) Abstract As FPGA technology continues to evolve - to provide us with full-blown SoCs with CPU, GPU, and high-speed peripherals, for example, joining the traditional programmable logic area - design verification becomes increasingly challenging. Lab-based FPGA testing and bring-up alone are clearly insufficient, especially for safety-critical designs, and FPGA …
