Design rules are at the heart of the interface between the foundry and semiconductor designers, which makes them so critical. Traditionally, design rules and DRC decks have been developed manually with no or little automation. Design rule definitions are written using WORD or other general purpose office tools, and DRC decks are programmed in an attempt to match that text definitions. This state of affairs leaves many challenges, such as:
- How do you verify that the DRM (design rule manual) rule definition accurately represents the rule intent?
- How do you ensure the definition is complete and unambiguous?
- How do you verify that the DRC code exactly matches the DRM definition?
So far, there have not been good solutions to these challenges, which resulted in a host of issues ranging from baffled designers, through delayed product ramps and all the way to product yield catastrophes.
iDRM from Sage-DA
Sage made its mission to tackle that problem and introduce automation to all stages of design rule development. This year at #53DAC they will demonstrate a complete system that connects all these dots: starting with design rule capture by the process integration team and delivering a compiled and verified DRC deck that accurately matches and represents the design rule intent.
The iDRM system consists of:
1. Design rule capture: GUI based rule entry tool which supports drawings, logic expressions, tables, etc.. Captured rules are executable and can check design examples right away to test the definitions and make sure they accurately express the intent.
2. DRC reference: Once the rules are captured, iDRM becomes the reference checker for DRC deck developers and early access PDK users. The iDRM rule-set accurately represents the design rule intent. It becomes the executable reference for the development and verification of DRC decks.
3. Electronic DRM: Once a set of rules has been captured, the user can view them in the form of an Electronic DRM, or use the tool to publish a traditional DRM copy. The design rule definitions in this DRM are formal, clear, unambiguous and complete.
4. Compiled DRC deck: iDRM enables automatic generation of DRC code by associating DRC code snippets with template rule definitions. For each design rule, iDRM generates the corresponding DRC code using the correct information such as, conditions, layer definitions and all other details. This eliminates errors and ensures consistency between the DRC deck and the DRM.
5. DRC deck verification and coverage: For each rule, the system automatically generates a set of passing and failing layout test cases. These test cases are used to test DRC code. iDRM also provides coverage metrics for these test cases.
6. Design Rule Extraction from existing layout: iDRM can extract design rules from a GDS data file and automatically create a design rule manual and DRC check for technologies that do not have proper design rule documentation.
7. Pattern extraction and classification: iDRM can now scan an entire design and extract all existing patterns, sort them and build a complete pattern library for every layer or combination of layers. Using this pattern library, iDRM can then scan any new design and indicate unknown patterns that are not in the pattern library.
Sign up for a demo at #53DAC and meet the Sage-DA team: http://www.sage-da.com/dac-2016.html