WP_Term Object
(
    [term_id] => 54
    [name] => Sage DA
    [slug] => sage-da
    [term_group] => 0
    [term_taxonomy_id] => 54
    [taxonomy] => category
    [description] => 
    [parent] => 14433
    [count] => 12
    [filter] => raw
    [cat_ID] => 54
    [category_count] => 12
    [category_description] => 
    [cat_name] => Sage DA
    [category_nicename] => sage-da
    [category_parent] => 14433
    [is_post] => 1
)

DRM2PDK: From design rule manual to process design kit

DRM2PDK: From design rule manual to process design kit
by Daniel Nenni on 05-28-2014 at 3:00 am

Exactly a year ago Sage Design Automation launched its revolutionary iDRM product, enabling for the first time to graphically capture design rules and compile them into checks automatically – no programming required. Using the graphical design rule editor, users could draw the layout topology that describes the design rule, could add measurements by drawing arrows between edges and objects and then use these measurements as parameters in a logic expression that represents the rule that needs to be kept. Once a rule has been captured in iDRM, it serves not only as a clear visual description and formal documentation of the design rule, but it also becomes an executable expression: Push a button and the design rule compiler will scan through a physical design database and will look for all instances that use a similar pattern to that design rule and take all the relevant measurements of the parameters (variables) that were used in the rule definition. The result is a complete list of all such instances, each with complete information of the relevant measurements, orientations, location, etc.


Draw design rule / View matches and errors / Get report of all values

iDRM now becomes a broad platform for anything design rules
iDRM design compiler has already been used to develop design rules, analyze them, create checks and verify DRC decks. Now, for this upcoming DAC, Sage-DA has broadened the scope and function of the iDRM platform to also include PDK parameters. At DAC, Sage-DA will demonstrate how PDK parameters for generating parametrized cells (Pcells) can be automatically created and updated from the iDRM design rule source. The iDRM platform can thus be used as a single point of entry for design rules enabling consistency and accuracy across a broad array of EDA tools and flows.

Process Design Kits (PDKs) include specific technology files for the creation of parametrized cells e.g. PCells and PyCells. Parametrized cells are widely used in custom digital, analog or mixed signal design. They are pieces of programming code that generates physical layout instances based on the Pcell parameter values. Pcells must obey to all the relevant design rules in order to generate DRC-correct physical instances. Currently, the tech files for these cells are created manually based on the information in the design rule manual (DRM). Anytime there is a change or update in the DRM, the relevant information needs to be updated in the respective Pcell technology file. This is a cumbersome and error prone process. With this new capability of iDRM, the relevant tech file parameters and resulting generated layout will be updated automatically once the DRM is updated with iDRM. This not only saves time, but it also ensures consistency and eliminates potential errors that may hinder the integrity of the physical design database.

Where to see: Demos of this new DRM2PDK capability will be held at the Design Automation Conference (DAC) on June 2-4 in San Francisco, at the Si2 booth #1107 at 12:00 PM on Monday June 2nd, and at the Sage-DA booth (#1423) throughout the exhibit hours.

Sage Design Automationprovides design rule consistency and closure between manufacturing process limitations, their respective DRM (design rule manual) representation and their DRC deck implementation.Sage-DA’s breakthrough iDRM (integrated design rule management) technology integrates an easy-to-use graphical design rule capture with instantaneous checking capability. iDRM enables non-programmers to quickly capture design rules and generate correct-by-construction checks, accelerates the development and availability of design rule checks for new process technologies and ensures their correctness and consistency, delivering higher yield and faster production ramp-up of integrated circuits (ICs) in advanced process technologies.

More Articles by Daniel Nenni…..

lang: en_US


Comments

There are no comments yet.

You must register or log in to view/post comments.