Tcl scripts and managing messages in ASIC & FPGA debug

Tcl scripts and managing messages in ASIC & FPGA debug
by Don Dingee on 04-27-2016 at 4:00 pm

Our previous Blue Pearl post looked at the breadth of contextual visualization capability in the GUI to speed up debug. Two other important aspects of the ASIC & FPGA pre-synthesis workflow are automating analysis with scripts and managing the stream of messages produced. Let’s look at these aspects… Read More


Fit-for-purpose IoT ASICs are about more than cost

Fit-for-purpose IoT ASICs are about more than cost
by Don Dingee on 04-06-2016 at 4:00 pm

We’ve been saying for a while that it looks like there is a resurgence in design starts for ASICs targeting the IoT. A recent webinar featuring speakers from ARM and Open Silicon (and moderated by Daniel Nenni) affirms this trend, and provides some insight on how these designs may differ from typical microcontrollers.

One of my first… Read More


Mentor ARM subscription signals ecosystem shift

Mentor ARM subscription signals ecosystem shift
by Don Dingee on 02-25-2016 at 4:00 pm

Since creating the landmark “all-you-can-eat” license with Samsung in 2002, ARM has inked several subscription deals with chipmakers and EDA firms. The latest ARM subscriber license deal just announced is for Mentor Graphics. What makes their strategy unique?… Read More


The (not so) Easy Life of an SOC Design Integrator

The (not so) Easy Life of an SOC Design Integrator
by Tom Simon on 02-16-2016 at 3:00 pm

How can large SOC projects effectively integrate sub blocks and IP into a stable version for release or internal development? The person responsible for integrating SOC sub blocks into a validated configuration for release has a difficult task. Usually there are many sub-blocks, each undergoing their own development. There… Read More


Coventor prepping MEMS for CMOS integration

Coventor prepping MEMS for CMOS integration
by Don Dingee on 10-07-2015 at 12:00 pm

About 11 months ago, I wrote a piece titled “Money for data and your MEMS for free.” In that, I took on the thinking that TSMC is just going to ride into town, fab trillions of IoT sensors, and they all will be 2.6 cents ten years from now. Good headline, but the technology and economics are not that simple. This may be the semiconductor … Read More


New Tool Suite to Accelerate SoC Integration

New Tool Suite to Accelerate SoC Integration
by Pawan Fangaria on 06-16-2015 at 12:30 pm

Today, an SoC is seen in the context of an optimized assembly of IPs; it’s no more a single monolithic chip design. It’s very common to see an ARM processor IP along with an interconnect IP, a memory IP, and couple of buses and interfaces IP in an SoC. Although the SoC seems to be an integrated collection of IPs, it can be very complex and… Read More


A song of optimization and reuse

A song of optimization and reuse
by Don Dingee on 07-01-2014 at 10:00 am

If you hang around engineers for any time at all, the word optimization is bound to come up. The very definition of engineer is to contrive or devise a solution. With that anointing, most engineers are beholden to the idea that their job is creating, synthesizing, and perfecting a solution specifically for the needs of a unique situation.… Read More


Shrinking audio creates issues and opportunities

Shrinking audio creates issues and opportunities
by Don Dingee on 02-26-2013 at 6:00 pm

There is a lot more to sound than meets the ear, and there a vast number of ways to deliver an audio experience. I recently trashed my gaming headset, replacing it with a Samson C03U mic and Audio-Technica ATH-PRO700MK2 headphones. It’s a huge upgrade, especially for podcasting, and I admit I was also motivated by research into digitalRead More