If you are building an advanced SoC, you know that you’re going to need a lot of embedded memory. Unless this is your first rodeo, you also know that which memories you choose can have a huge impact on Power, Performance and Area (PPA) and, for some applications, Energy (power integrated over time), Temperature and Reliability. Which makes selecting the optimal memories for your objective a pretty important part of architecting the design and optimally using those IPs in implementation.
If you are working with an ASIC company like eSilicon, you also have foundry options. Since memory macros and compilers are foundry-specific, in your planning you’ll want to use memory models for your selected foundry (and explore the options offered by that foundry). eSilicon recently announced an extension to their STAR Navigator tool to provide automated, online quoting and purchasing capabilities for memory IP and I/O libraries from their IP design team. I thought it would be interesting to check it out in the context of this objective.
I started with Try and Buy IP, which took me to the Compare screen above. I was mostly interested in comparing PPA for various options, so chose to “Browse system instances” (so I didn’t have to create my own instances). This takes you to a screen where you can select options you want to compare (you may need to get approval to look at some options if you are just tire-kicking).
I chose to assume that I was already committed to TSMC and 28nm and I wanted to take a look at 2-port register files. Making selections automatically adjusts options in lower rows so you only get to pick from available options. Some of the options could use slightly more explanation (Mike Gianfagna, VP of marketing at eSilicon told me this is being improved) but aren’t really that difficult to figure out – NW: number of words, NB: bits per word and CM: column muxing. I chose “ALL” on these options to see how PPA was going to vary as a function of these parameters.
Once you’ve finished a selection, hit “Find Instances” below and a configuration line appears below that, then click on “Add to Compare”. To compare I needed to select some other configurations, so clicked on “Add more instances”. I tried adding the same configuration, at a Typ-typ corner (the first was Fast-fast), and an HPM implementation at fast-fast (the first was HPC).
When I had selected each of these instances, I could easily run comparisons on various parameters. First I went for read power versus area (above). Since the largest configurations have the largest area, it’s not too surprising that dynamic read (DR) power rises with area. I can also see how each of the process choices behaves with respect to the others. The specific process detail has been removed to protect confidentiality. You can see all the details when running the tool, however. I can generate similar plots for dynamic write and leakage power. By the way, you can also hover over any point to see a detailed breakdown for that instance.
Now the performance part of PPA. Above is the plot of DR power against frequency. This didn’t require any change in configuration setup; I just selected frequency as the X-axis. Unsurprisingly, the highest frequency instances are for the smallest memories. You can see that by hovering over the data points and examining that particular memory configuration.
You can play around with these graphs in a bunch of different ways, plotting say leakage power versus total bits. You can also dump results out to a CSV file so you can do more detailed analysis in your architectural modeling.
When you’re done, you can select one or more memory IP instances and generate full CAD models (Verilog, VHDL, .lib and so on). That gets you up and running with memory models (download from the “My IP” tab) in your simulation and you haven’t committed a dime yet.
Finally, few things in life are free, so time to find out what using this memory instance will cost you. Select the instance, add it to your shopping cart, then click on the cart logo. Just like Amazon! Of course IP like this is a bit pricier than an Amazon purchase; a 256×8 bit 2-port register file came in at over $50k. But that’s a drop in the investment bucket for the mobile applications in which these IP are commonly used.
Check out the eSilicon Navigator Try and Buy site to explore memory IP options. It’s a pretty useful capability to help you figure out some of the key decisions you’re going to have to make about your design. You can start HERE.