Instrumenting post-silicon validation is not a new idea but here’s a twist. Using (pre-silicon) emulation to choose debug observation structures to instrument in-silicon. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research… Read More
Author: Bernard Murphy
Instrumenting Post-Silicon Validation. Innovation in Verification
A Hardware Security Standard Advances
Security is a slippery topic. We all agree that “something should be done”, but most of us are waiting for someone else to lead the way. There’s no shortage of proprietary solutions, though given the distributed nature of the problem it’s difficult to see how those separately or collectively can rise to the occasion. What we really… Read More
The Zen of Auto Safety – a Path to Enlightenment
Safety is a complex topic, but we’re busy. We take the course, get the certificate. Check, along with a million other things we need to do. But maybe it’s not quite that simple. I talked recently with Kurt Shuler (VP of marketing) and Stefano Lorenzini (functional safety manager) at Arteris IP and concluded that finding enlightenment… Read More
Neural Nets and CR Testing. Innovation in Verification
Leveraging neural nets and CR testing isn’t as simple as we first thought. But is that the last word in combining these two techniques? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research ideas. As always, feedback welcome.… Read More
Low Power Positioning for Logistics – Ultimate Tracking
When thinking about positioning you probably first think of navigation. The device in your car that helps get from where you are to where you want to be. Or navigating while hiking in the backcountry. But those applications are not the where the big unit growth will come. The biggest demand will be in asset tracking, expected to reach… Read More
Connecting System Design to the Enterprise
While systems design underpins the explosion in “smart everything”, it remains somewhat isolated from another explosion—the proliferation of tools for application lifecycle management (ALM). ALM tools are prevalent on the web, in the cloud and on our phones, to streamline product design and build, to track correspondence… Read More
IP-XACT Resurgence, Design Enterprise Catching Up
This standard has been around in one form or another for over ten years and was then arguably ahead of its time. RTL designers were confused: ‘We already have RTL. Why do we need something else?’ I also didn’t get it. Still, the standard plugged ahead among the faithful and found traction among IP vendors. Particularly as a common format… Read More
Accellera Unveils PSS 2.0 – Production Ready
I recently had a discussion with Tom Fitzpatrick of Siemens and Faris Khundakjie of Intel on the latest release of the Portable Test and Stimulus Standard (PSS). Faris chairs the PSS working group and Tom is vice-chair. In what follows I synthesize feedback from both, sometimes I call out interesting individual comments. My first… Read More
Fuzzing to Validate SoC Security. Innovation in Verification
Fuzzing is to software verification what randomization is hardware verification. Can a fuzzing approach improve hardware security testing? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research ideas. As always, feedback… Read More
Avery Levels Up, Starting with CXL
Let me acknowledge up front that Avery isn’t the most visible EDA company around. If you know of them, you probably know their X-propagation simulator. Widely respected and used, satisfying a specialized need. They have also been quietly building over the years a stable of VIPs and happy customers, with a special focus on VIPs for… Read More
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