eSilicon@Samsung: ASIC Design, IP Enablement, and Cloud Platform

Earlier this week at DAC, Javier DeLaCruz of eSilicon presented at the Samsung booth. They presented an introduction to what eSilicon does. However, since what they do has changed over the years it is useful to recap. If you know about eSilicon then you probably think of them as a fabless ASIC company. The old ASIC model back in the 1980s and 1990s was that the system house would do design to netlist and then pass that to the ASIC company who would do physical design, manufacture the design and deliver packaged parts.

Designs are much more complex these days. eSilicon typically will partner with the customer from the very beginning of the design. So eSilicon either does or helps the customer do:

• technology selection
• IP selection
• design
• assembly and test development
• manufacture

The area where there is the most variation is doing the design itself. If the customer has a lot of design expertise in-house they may basically do the entire design and deliver mask data to eSilicon. If they have none they may deliver some higher level specification of the design and have eSilicon do the design for them.

Some companies just get eSilicon to do manufacturing. Since eSilicon doesn’t actually have fabs of its own, this seems self-contradictory, but in fact a lot of running a design in production is management and tracking of the design through the manufacturing process. In high volume, a design might be millions of parts per month for many months, so it is not a one-shot deal. eSilicon calls this SMS (for Silicon Manufacturing Services).

Another area where eSilicon has a lot of expertise is IP selection, especially in memories. They have their own memory IP development groups (mostly in Vietnam). These groups can provide standard IP but they can also customize IP for specific designs. For example, in the chip below, which is a broadband processor for the handheld market, the memory was 50% of the die area but by doing a customized memory solution they saved 20% of the memory area, or 10% of the complete die area.

eSilicon have also been a pioneer in HBM (high bandwidth memory), starting with HBM1 in 2013 and with HBM2 IP development underway. HBM is thru-silicon-via (TSV) memory stacked on top of the logic die. To be useful, just as with standard DRAM, there needs to be a standard interface (where the TSVs are, what the signals are and so on) and indeed JEDEC produced a standard JESD235. By definition, HBM is not just a design issue, it is a packaging and manufacturing issue too since these are true 3D chips. See the picture to the right.

Another area where eSilicon has been a pioneer is in bringing more and more of the customer interface online so that it can be accessed by users directly without requiring human involvement. So just as an ATM makes getting money easier and more convenient, so customers can help themselves to:

• IP selection
• MPW shuttle quotes
• Production quotes
• Design optimization quoting (this one is not untouched by human hand but the early acceptability analysis is)

These all go out under the new STAR banner (standing for self-service, transparent, accurate, real-time) which I wrote about in detail last week.

See eSilicon Lyfts Its Game

Samsung Foundries’ website is here. eSilicon’s website is here.