Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!

Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!
by Daniel Nenni on 08-10-2019 at 6:00 am

Image RemovedAs more than 343 people (and counting) know, we will be releasing the 2019 updated PDF version of our first book “Fabless: The Transformation of the Semiconductor Industry” via handout at a live webinar. The response has been overwhelming and I want to personally thank you. The webinar will be a brief overview of the… Read More


3 small-team design productivity challenges managed

3 small-team design productivity challenges managed
by Don Dingee on 09-21-2016 at 4:00 pm

“Data management tools? We use small teams doing small designs. Each project only has two or three designers. Everyone uses the same EDA tools. Why do we need another tool for collaboration?” Good question. If you enjoy frequent meetings and redoing work because someone didn’t understand the status of IP blocks, the answers may… Read More


If an Intel 10nm transistor fell in the ARM forest

If an Intel 10nm transistor fell in the ARM forest
by Don Dingee on 08-18-2016 at 4:00 pm

Intel’s news at IDF this week about partnering with ARM for foundry services on 10nm set off some wild speculation. It’s not a surprise that ARM would enable Intel – they’ve worked together before, ARM is an equal opportunity ecosystem partner, and ARM has publicly announced 10nm cores taped out at TSMC.… Read More


In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April

In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April
by Adele Hars on 04-02-2016 at 7:00 am

If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More


Webinar: A Tool for Process and Device Evaluation

Webinar: A Tool for Process and Device Evaluation
by Tom Simon on 03-24-2016 at 12:00 pm

Not only are foundries continuing to introduce processes at new advanced nodes, they are frequently updating or adding processes at existing nodes. There are many examples that illustrate this well. TSMC now has 16FF, 16FF+ and now 16FFC. They are also announcing 10nm and 7nm processes. In addition, they are going back to older… Read More


Pure-play Foundries to Prevail in Future

Pure-play Foundries to Prevail in Future
by Pawan Fangaria on 01-17-2016 at 7:00 am

In a consolidating semiconductor business environment and innovation in semiconductor fabrication already scaling new heights with existing strong players, where do you think the wafer capacity should concentrate? It’s pure-play foundries or pure-play-like foundries, and those who supply high-volume common components… Read More


Calibre in the Middle of Semiconductor Ecosystem

Calibre in the Middle of Semiconductor Ecosystem
by Pawan Fangaria on 12-20-2015 at 12:00 pm

Albert Einsteinhad said, “In the middle of difficulty lies opportunity”. In today’s world dominated by technology, or I must say internet which has initiated collaborative information sharing, “leading from the middle” is the new mantra of life.… Read More


Xilinx Skips 10nm

Xilinx Skips 10nm
by Paul McLellan on 09-28-2015 at 7:00 am

Image RemovedAt TSMC’s OIP Symposium recently, Xilinx announced that they would not be building products at the 10nm node. I say “announced” since I was hearing it for the first time, but maybe I just missed it before. Xilinx would go straight from the 16FF+ arrays that they have announced but not started shipping,… Read More


TSMC OIP: What to Do With 20,000 Wafers Per Day

TSMC OIP: What to Do With 20,000 Wafers Per Day
by Paul McLellan on 09-17-2015 at 4:42 pm

Image RemovedToday it is TSMC’s OIP Ecosystem Innovation forum. This is an annual event but is also a semi-annual update on TSMC’s processes, investment, volume ramps and more. TSMC have changed the rules for the conference this year: they have published all the presentations by their partners/customers. Tom Quan… Read More


eSilicon Truly Puts the ‘e’ in Silicon

eSilicon Truly Puts the ‘e’ in Silicon
by Paul McLellan on 09-12-2015 at 7:00 am

Image RemovedeSilicon have a new website. Companies update their websites regularly, so why is this news? Well, eSilicon increasingly does their business on the web. They are not like Facebook, say, where their business is entirely web-based, there is a physical business behind them. So they are more like Lyft for chips. Obviously… Read More