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Gim Tan at Magma did a webinar on analog circuit optimization, so I watched it today to see what I could learn about their approach. Gim is a Staff AE, so not much marketing fluff to wade through in this webinar.
The old way of designing custom analog circuits involves many tedious and error prone iterations between front-end (Schematic… Read More
Smaller IC nodes bring new challenges to the art of IC layout for AMS designs, like Layout Dependent Effects (LDE). If your custom IC design flow looks like the diagram below then you’re in for many time-consuming iterations because where you place each transistor will impact the actual Vt and Idsat values, which are now a … Read More
Listening to the Intel earnings call yesterday and then reviewing the transcript last night, I came away with two thoughts that I think are key to understanding where the PC and mobile industry… Read More
ARM Seahawkby Paul McLellan on 04-17-2012 at 8:27 pmCategories: Arm, IP
I wrote on Monday about ARM’s Processor Optimization Packs (POPs). In Japan they announced yesterday the Seahawk hard macro implementation in the TSMC 28HPM process. It is the highest performance ARM to date, running at over 2GHz. It is a quad-core Cortex A15.
The hard macro was developed using ARM Artisan 12-track libraries… Read More
Smart mobile SoCs: Qualcommby Don Dingee on 04-17-2012 at 8:19 pmCategories: Arm, IP
In the opener to this series, I alluded to a company designing their own approach, and it goes way beyond the graphics core in their solution. Qualcomm is unique in a holistic approach to a smart mobile device with their vertically integrated chipset, the Snapdragon S4.… Read More
Since November of 2011 when Intel preannounced it would come up short in Q4 due to the flooding in Thailand that took out a significant portion of the HDD supply chain, the analysts on Wall St. have been in the dark as to how to model 2012. Intel not only shorted Q4 but they effectively punted on Q1 as well by starting the early promotion… Read More
TSMC’s technnology symposium seems to be the new time to make product announcements, with ARM and Atrenta yesterday and Springsoft today.
There is a new incarnation of Springsoft’s Laker layout family, Laker[SUP]3[/SUP] (pronounced three, not cubed). The original version ran on its own proprietary database.… Read More
My first IC design in 1978 was a 16Kb DRAM chip at Intel and our researchers discovered the strange failure of Soft Errors caused by Alpha particles in the packaging and neutron particles which are more prominent at higher altitudes like in Denver, Colorado. Before today if you wanted to know the Soft Error Rate (SER) you had to fabricate… Read More
Atrenta is having a special offer to let you “spring clean” your IP for free. They are providing two weeks of free access to the Atrenta IP kit starting from today, April 16th, until the end of May. During this period, qualified design groups in the US will be able to use the kit for two consecutive weeks to “spring… Read More
In today’s era, high performance mobile devices are asserting their place in every gizmos we play with and guess what enables them work efficiently behind the scene – it’s large chunks of memory with low power and high speed, packed as dense as possible. Ever growing requirement of power, performance and area led us to process nodes… Read More
Intel and the IFS Dilemma: Stuck Between a Rock and a Hard Place – Should They attempt to Sell Intel Foundry Services