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Parasitic Extraction—My Head Hurts!

Parasitic Extraction—My Head Hurts!
by glforte on 10-27-2011 at 10:08 am

By Carey Robertson, Director of Product Marketing, Mentor Graphics

IC physical verification requires a number of different types of checking, the most familiar being design rule checking (DRC), layout vs. schematic (LVS) checking, and parasitic extraction combined with circuit simulation. Fundamentally, it does not matter… Read More


ARM TechCon 2011 Trip Report and Sailing Semiconductors!

ARM TechCon 2011 Trip Report and Sailing Semiconductors!
by Daniel Nenni on 10-26-2011 at 9:37 pm

This was my first ARM TechCon, they cordially invited me as media, but it certainly was not what I expected. Making matters worse, I had literally just flown in from a very long weekend sailing in Mexico which was much more interesting and certainly made me much less tolerant of sales and marketing nonsense. My Uncle Jim lives on a sailboat… Read More


Synopsys Journal, now on Itunes

Synopsys Journal, now on Itunes
by Paul McLellan on 10-24-2011 at 9:42 am

Synopsys Journal is a quarterly publication for management dedicated to covering the latest issues facing designers today. It has been published now for two and a half years. Of course, you can go here and, once registered, get a copy of the journal.

But people don’t have a lot of time to read a journal like this so it has been … Read More


Noise Coupling

Noise Coupling
by Paul McLellan on 10-24-2011 at 8:47 am

One of the challenges of designing a modern SoC is that the digital parts of the circuit are really something that in an ideal world you’d keep as far away from the analog as possible. The digital parts of the circuit generate large amounts of noise, especially in the power supply and in the substrate, two areas where it is impossible… Read More


TSMC 2011 Open Innovation Platform Ecosystem Forum Trip Report

TSMC 2011 Open Innovation Platform Ecosystem Forum Trip Report
by Daniel Nenni on 10-23-2011 at 3:00 pm

The TSMC OIP conference was Monday and Tuesday of last week. You have probably NOT read about it since it was invitation only and press was not invited. Slides were not made available (except for Mentor), no photos or video were allowed, it was a very private affair. Given that, I won’t be able to go into great detail but I will give you… Read More


Intel’s Incredible Semiconductor Machine

Intel’s Incredible Semiconductor Machine
by Ed McKernan on 10-21-2011 at 8:15 am

It is hard not to be impressed by Intel’s stunning financial performance since the 2008 downturn. They are on track to post revenue of $55B this year or 50% higher than 2008 while nVidia and AMD will be flat to less than 10% better. More significantly, earnings will be 3X that of 2008. More significantly, in the past 12 months they have… Read More


Oct 27 – Hands-on Workshop with Calibre: DRC, LVS, DFM, xRC, ERC (Fremont, California)

Oct 27 – Hands-on Workshop with Calibre: DRC, LVS, DFM, xRC, ERC (Fremont, California)
by Daniel Payne on 10-20-2011 at 9:56 am

I’ve blogged about the Calibre family of IC design tools before:

Smart Fill replaced Dummy Fill Approach in a DFM Flow

DRC Wiki

Graphical DRC vs Text-based DRC

Getting Real time Calibre DRC Results with Custom IC Editing

Transistor-level Electrical Rule Checking

Who Needs a 3D Field Solver for IC Design?

Prevention is BetterRead More


AMS Design at AnSem

AMS Design at AnSem
by Daniel Payne on 10-19-2011 at 3:40 pm

AnSem has been in the AMS design business since 1998 and uses a variety of commercial EDA tools along with internally developed tools and scripts to automate the process of analog design and technology porting. Their IC designers have completed some 40 AMS projects in diverse areas like:

  • RF CMOS
    • LNA, VCO, Mixers
    • Synthesizers
    • Low-IF/Zero-IF
Read More

Apache on the Road

Apache on the Road
by Paul McLellan on 10-19-2011 at 2:01 pm

There are lots of places that Apache is going to popping up in the next few weeks.

Firstly, Andrew Yang will deliver the keynote on October 24th at the Electrical Performance of Electronic Packaging and Systems (EPEPS) in San Jose. He will be talking about “Chip-Package-System convergence: bridging multiple disciplings… Read More


SICAS capacity data loses TSMC and UMC

SICAS capacity data loses TSMC and UMC
by Bill Jewell on 10-19-2011 at 10:26 am

SICAS (Semiconductor Industry Capacity Statistics) has released its 2Q 2011 data with significant changes in membership. The data is available through the SIA at: SICASdata The SICAS membership list no longer includes the Taiwanese companies Nanya Technology, Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) or UnitedRead More