With the advent of HLS tools, general notion which comes to mind is that okay, there’s an automated tool which can optimize your design description written in C++/SystemC and provide you a perfect RTL. In real life, it’s not so, any design description needs hardware designer’s expertise to adopt right algorithm and architecture… Read More
WEBINAR: Revolutionizing Electrical Verification in IC DesignIn the complex world of IC design, electrical…Read More
Silicon Catalyst on the Road to $1 Trillion IndustryThere were quite a few announcements at the…Read More
Hierarchically defining bump and pin regions overcomes 3D IC complexityBy Todd Burkholder and Per Viklund, Siemens EDA…Read More
CDC Verification for Safety-Critical Designs – What You Need to KnowVerification is always a top priority for any…Read More
Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical RobotsIn the rapidly evolving landscape of connected devices,…Read More
GLOBALFOUNDRIES Acquires IBM Semiconductor Unit!
I have it on pretty good authority that IBM has in fact come to terms with GLOBALFOUNDRIES on the sale of their semiconductor business. For those of you who have been following the story, especially the IBM semiconductor people, it has been a real roller coaster ride. If in fact this handshake deal goes through (expect a public announcement… Read More
Optimize Your Interconnect & Design at System Level for Best Results
As the SoC design size, complexity and functionality keeps on increasing with multiple IPs packed together and design time and time-to-market keeps on decreasing amid critical constraints on PPA, there is no other alternative than to do the design first-time-right not to miss the window of opportunity. And that could be possible… Read More
Interface IP Protocols: Status
If your company develops Design IP to support well-known protocols like USB, PCIe, HDMI, DDRn memory controller, MIPI specification (and more), it’s crucial to know your competition, the market size by segment, and even more important the market potential by segment. The latest can be obtained by the Compound Annual Growth Rate… Read More
Taiwan Trip Report: The Coming Simulation Crisis!
Even though the flight to Taiwan is somewhat difficult, I really do enjoy my trips to Hsinchu. In addition to the top two pure-play foundries being there, one of the top SoC companies (MediaTek) and many of the leading semiconductor design companies are there as well. All are a quick taxi ride from my home away from home, the Hotel Royal.… Read More
Safer SoCs for safer driving
Flip on the TV, and a car commercial is bound to pop up shortly touting one of two technological aspects. One is center stack integration of smartphone-style applications. The other is advanced driver assistance systems (ADAS) featuring cameras, radar, and other sensors helping cars … Read More
Intel Core M vs Apple A8!
There were two big announcements last week right in my backyard and I missed them both! Instead, I was in Taiwan investigating yet another big development and all three of these events will intersect next year, absolutely.
At IDF in San Francisco Intel outlined the new 14nm Core M. This is an impressive CPU, one that will fill the now… Read More
Pole Pole All the Way to the Top
We made it! I have stood on the highest point in Africa, Uhuru Peak of Kilimanjaro.
Obviously this blog entry is totally off-topic. If you want to read about semiconductors and stuff, you can skip it.
So how do you get to the top of a nearly 20,000’ mountain? Slowly.
Slowly on two different levels. The first level is giving your body time… Read More
Sidense overlays OTP on TSMC 16nm FinFET
Process shrinks, which have served us well for most of the Moore’s Law journey, are reaching their limits. For switching transistors, the biggest problems of leakage current and gate oxide vulnerability in planar MOSFETs have led the industry to new 3D microstructures such as FinFET. For non-volatile memory, the problem is generally… Read More
Expert Tool to View and Debug Design Issues at Spice Level
Spice view of a design, block or fragment of the design is probably the lowest level of functional description of a circuit in terms of transistors, resistors, capacitors, interconnect and so on, which in several ways acts as an ultimate proof of pudding for any semiconductor design before manufacturing. However, it’s generally… Read More
An Insight into Building Quantum Computers