Shift Left with S2C Prodigy: From RTL Verification to Real-World Software ValidationFor modern SoC teams, “shift left” no longer…Read More
How SOCAMM2 Could Reshape Server Memory for AIAs artificial intelligence systems become larger and more…Read More
Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems ConferencePurple was in fashion at the 2026 Design…Read More
CEO Interview with Joseph Krause of Radical AIJoseph F. Krause is an American materials scientist,…Read More
I talked with Paul Cunningham (VP front-end digital R&D) at CDNLive recently to get a Cadence perspective on digital design trends. He sees needs from traditional semiconductor companies evolving as usual, with disruption here and there from consolidation. But on the system side there is explosion in demand – for wearables,… Read More
We introduced the philosophy behind the Blue Pearl Software suite of tools for front-end analysis of ASIC & FPGA designs in a recent post. As we said in that discussion, effective automation helps find and remedy issues as each re-synthesis potentially turns up new defects. Why do Blue Pearl users say their tool suite is easier… Read More
The smartphone segment is certainly the most competitive market for chip makers today and the yearly product launch cadence puts a lot of pressure on the application processor design cycle. End-users expect to benefit from higher image definition, better sound quality, ever faster and more complex applications which push the… Read More
The worldwide revenue of semiconductor industry has remained flat in last few years; to be more precise, overall semiconductor revenue declined by 1.9% in 2015 and Gartner forecasts it to further decline by 0.6% in 2016. The total revenue was at record high of $340.3 billion in 2014.
Well, semiconductor industry has matured. A … Read More
When I first heard about a foundry possibly licensing FD-SOI I would have bet it was SMIC in China. What better market for a low cost, low power, easy to manufacture alternative to FinFETs? The foundry of course was Samsung which also made complete sense since they have 28nm gate-first capacity that matches up nicely to 28nm FD-SOI.… Read More
Security threats are the biggest concern among the main concerns on the Internet of Things. Due to its very nature, it is a target of interest for those who want to commit either industrial or national espionage. By hacking into these systems and putting them under a denial of service, or other attacks, an entire network of systems… Read More
In one of my whitepapers “SoCs in New Context – Look beyond PPA”, I had mentioned about several considerations which have become very important in addition to power, performance, and area (PPA) of an SoC. This whitepaper was also posted in parts as blogs on Semiwiki (links are mentioned below). Two important… Read More
With use cases expanding, the meaning of “automotive qualified” semiconductors is changing. What we’re now hearing about now is beyond the AEC-Q100 Grade 0 upper end of 150°C, while still meeting other reliability, retention, and security requirements. What does hypergrade mean for complex digital chip… Read More
There’s a good article in the March issue of the Communications of the ACM which follows a theme I commented in my “One, Two Many” post. But the CACM article has a better title: “Automation should be like Iron Man, not Ultron”.
For anyone who hasn’t seen the movies, Iron Man is a man (Tony Stark)… Read More
The impact of process variation at advanced nodes is increasing — no surprise there. In recent years, the principal design emphasis to better reflect this variation has been the adoption of two new methodologies: (1) advanced on-chip variation (AOCV, as well as POCV/LVF) for digital static timing analysis, and (2) advanced… Read More
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Intel and TSMC Take Different Paths to High-NA EUV