The IO Hub: An Emerging Pattern for System Connectivity in Chiplet-Based DesignsIn chiplet-based design we continue the march of…Read More
Future Horizons Industry Update Webinar IFS 2025The Future Horizons Industry Update Webinar, presented today…Read More
Something New in Analog Test AutomationDigital design engineers have used DFT automation technologies…Read More
MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power EfficiencyMediaTek’s first chipset using 2nm technology expected in…Read More
– Semi Situation Stems from long term systemic neglect
– Will require much more than money & time than thought
– Fundamental change is needed to offset the financial bias
– Auto industry is just the hint of a much larger problem
Like recognizing global warming when the water is up to your neck
The problem… Read More
Power integrity analysis in large chip designs is especially challenging thanks to the huge dynamic range the analysis must span. At one end, EM estimation and IR drop through interconnect and advanced transistor structures require circuit-level insight—very fine-grained insight but across a huge design. At the other, activity… Read More
USB made its big splash by unifying numerous connections into a single cable and interface. At the time there were keyboard ports, mouse ports, printer ports and many others. Over the years USB has delivered improved performance and greater functionality. However, as serial interfaces became more popular and started being used… Read More
Resistive RAM (ReRAM) technology has emerged as an attractive alternative to embedded flash memory storage at advanced nodes. Indeed, multiple foundries are offering ReRAM IP arrays at 40nm nodes, and below.
ReRAM has very attractive characteristics, with one significant limitation:
In tiny devices, such as true wireless headphones, the battery life of the device is usually determined by the chips that execute the device’s functions. Professor Jan Rabaey of UC Berkeley, who wrote the book on low power, also coined the term “energy frugal” a number of years ago, and this term is even more valid today with the proliferation… Read More
Radiation hardening is admittedly not a challenge every SoC design team faces. Methods to address this challenge typically involve a new process technology, a new library or both. Trusted, secure design is something more design teams worry about and that number is growing as our interconnected world creates new and significant… Read More
Now that semiconductor conferences are virtual there are better speakers since they can prerecord and we have the extra time to do a better job of coverage. Even when conferences go live again I think they will also be virtual (hybrid) so our in depth coverage will continue.
ISSCC is one of the conferences we covered live since it’s… Read More
In its February 20, 2021 edition, the Economist published an article entitled “How to kill a democracy; China faces fateful choices, especially involving Taiwan”. It went on to quote “To many Chinese, the island’s conquest is a sacred national mission” as well as a by-line “America is losing its ability to deter a Chinese attack… Read More
Today’s societies are becoming ever more multimedia-centric, data-dependent, and automated. Autonomous systems are hitting our roads, oceans, and air space. Automation, analysis, and intelligence is moving beyond humans to “machine-specific” … Read More
Functional Verification for complex ASICs or IP-Core products is a resource limited ‘quest’ to find as many bugs as possible before tape-out or release. It can be a long, difficult and costly search that is constrained by cost, time and quality. The search space is practically infinite, and 100% exhaustive verification is an unrealistic… Read More
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