If you are involved in designing systems that process data, you’re going to want to attend this webinar. Practically speaking, this should include a large percentage of the SemiWiki readership. Since data is the new oil there are a lot of applications drawn to data and information processing. Before we explore this webinar, let’s unpack some of its terminology. A NIC (network interface card) plugs into a server or storage device to establish connectivity to an Ethernet network. A SmartNIC will implement some processing of the network traffic to offload the CPU. Functions such as encryption/decryption, TCP/IP and HTTP can be handled this way. I’ll get into what reconfigurability provides in a moment. And finally, NoC stands for network on chip – a sophisticated way to interconnect things. What a 2D NoC provides will be discussed as well. So, with this background let’s explore 5 reasons why a high performance reconfigurable SmartNIC demands a 2D NoC.
The webinar is presented by Scott Schweitzer, senior manager of product planning at Achronix. SemiWiki has covered many aspects of Achronix and you learn more here. Scott is *very* knowledgeable about the subject matter and provides an easy-to-understand, no-nonsense view of some very technical topics. Scott has a lot to offer, and you’ll learn a lot from him.
A bit about his background will help illustrate what I mean. Since his early work with a TRS-80, Scott has been a lifelong technology evangelist. He’s written profitable software products for Apple’s App Store, built hardware, and formally managed programs for IBM, NEC, Myricom, Solarflare, Xilinx, and now Achronix. As 10 Gigabit Ethernet adoption started in 2009, he launched the popular 10GbE.net blog. With market changes in 2017, Scott rolled this property into TechnologyEvangelist.co. This blog now sees thousands of monthly page views, and the accompanying podcast is growing. At Achronix, Scott focuses on accelerating networking; he works with customers and partners to recognize new opportunities and define innovative products and solutions.
Scott is also an alum of NYU, as I am. I haven’t met Scott, but I feel I know him well after watching his webinar.
Scott begins by describing the three architectures in use today to implement SmartNICs. They are Bump in Wire, Von Neumann Sidecar and Single Chip. Colorful names; you’ll need to attend the webinar to find out what each one does and what their strengths and weaknesses are. Scott does a great job providing a historical perspective on these approaches and where the industry is going today. Spoiler alert: the substantial demands for performance presented by the massive data rates and volumes we’re seeing strongly favors a single chip approach.
Scott also explores what reconfigurability brings to a SmartNIC. As mentioned earlier, a SmartNIC can perform many complex operations on data packets without involving the host CPU. This provides a “turbo boost” to overall system throughput. The fact is, these operations are changing all the time, and new functions are needed as well. A reconfigurable SmartNIC provides a degree of “future proofness” against these demands; it can evolve with system requirements, a significant benefit.
Another open item from my introduction was a 2D NoC. Scott does a great job explaining what a 2D NoC is and why it’s critical to meet data throughput needs. You need to watch the webinar to get the whole story. I will leave you with another small spoiler – data needs to be moved through a SmartNIC to the next part of the network. The data also needs to be moved between many processing steps on the SmartNIC. A 2D NoC handles both.
There are many aspects of high-performance networking discussed by Scott during this webinar. Here is the agenda:
- The reconfigurable SmartNIC
- Reasons for the approach:
- High bandwidth
- Network virtualization
- The importance of a two-dimensional NoC
You need to watch this webinar to get the whole story. The webinar will be broadcast on Thursday, June 17, 2021, from 10:00 AM – 11:00 AM PDT. You can register for the webinar here to understand the 5 reasons why a high performance reconfigurable SmartNIC demands a 2D NoC.Share this post via: