400 GbE SmartNIC IP sets up FPGA-based traffic management

400 GbE SmartNIC IP sets up FPGA-based traffic management
by Don Dingee on 07-13-2023 at 10:00 am

Achronix ANIC

Sustaining wire-speed 400 GbE transfers is only a first step in managing enterprise traffic. Adding rules-based filtering to sift packets in real time can stress most networking hardware to a breaking point, slowing down an entire network. Architects are trying to spread these loads, distributing intelligent traffic management… Read More


WEBINAR The Rise of the SmartNIC

WEBINAR The Rise of the SmartNIC
by Don Dingee on 09-08-2022 at 10:00 am

Achronix Webinar - Rise of the SmartNIC

A recent live discussion between experts Scott Schweitzer, Director of SmartNIC Product Planning with Achronix, and Jon Sreekanth, CTO of Accolade Technology, looked at the idea behind the rise of the SmartNIC and ran an “ask us anything” session fielding audience questions about the technology and its use cases.

Three phases

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2D NoC Based FPGAs Valuable for SmartNIC Implementation

2D NoC Based FPGAs Valuable for SmartNIC Implementation
by Tom Simon on 12-29-2021 at 6:00 am

2D NoC SmartNIC

Smart network interface cards (SmartNICs) have proven themselves valuable in improving network efficiency. According to Scott Schweitzer, senior product manager at Achronix, it has been shown that SmartNICs can relieve up to – and perhaps beyond – 30% of the host processor’s loading. SmartNICs started out taking… Read More


PCIe Gen5 Interface Demo Running on a Speedster7t FPGA

PCIe Gen5 Interface Demo Running on a Speedster7t FPGA
by Kalar Rajendiran on 11-24-2021 at 10:00 am

PCIe Gen5 Interface Demo Board

The major market drivers of today all have one thing in common and that is the efficient management of data. Whether it is 5G, hyperscale computing, artificial intelligence, autonomous vehicles or IoT, there is data creation, processing, transmission and storage. All of these aspects of data management need to happen very fast.… Read More


Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC
by Kalar Rajendiran on 11-04-2021 at 6:00 am

6 Reason 1 High Bandwidth 6

As part of their webinar series, SemiWiki hosted one in June with the title “Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC.” The talk by given by Scott Schweitzer, Sr. Manager, Product Planning at Achronix. Scott is a lifelong technology evangelist and focuses on recognizing technology trends and… Read More


WEBINAR: 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

WEBINAR: 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC
by Mike Gianfagna on 06-10-2021 at 6:00 am

WEBINAR 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

If you are involved in designing systems that process data, you’re going to want to attend this webinar. Practically speaking, this should include a large percentage of the SemiWiki readership. Since data is the new oil there are a lot of applications drawn to data and information processing. Before we explore this webinar, let’s… Read More


AMD and Intel Update with Xilinx

AMD and Intel Update with Xilinx
by Daniel Nenni on 11-06-2020 at 10:00 am

AMD Xilinx Acquisition

The AMD acquisition of Xilinx is certainly big news but as an insider looking at the media coverage I think there are a few more points to consider. While most of the coverage has been positive there will always be negatives and we can look at that as well.

Intel acquired Altera in 2015 for $16.7B at a 50% premium which was a major disruption… Read More