New Block Floating Point Arithmetic Unit for processing AI/ML Workloads in FPGA

New Block Floating Point Arithmetic Unit for processing AI/ML Workloads in FPGA
by Daniel Nenni on 03-03-2020 at 10:00 am

Achronix Webinar SemiWiki 1

Block Floating Point (BFP) is a hybrid of floating-point and fixed-point arithmetic where a block of data is assigned a common exponent. We describe a new arithmetic unit that natively performs Block Floating Point for common matrix arithmetic operations and creates floating-point results. The BFP arithmetic unit supports… Read More


Insights from the Next FPGA Platform Event

Insights from the Next FPGA Platform Event
by Daniel Nenni on 02-11-2020 at 10:00 am

The Next FPGA Platform SemiWiki

Unfortunately, I missed this event since I was in China. Fortunately, Manoj Roge VP Strategic Planning and Business Development at Achronix participated and did a nice write-up. Manoj has more than 20 years of experience in the programable business with Cypress Semiconductor, Xilinx, Altera, and now Achronix so you should definitely… Read More


FPGAs in the 5G Era!

FPGAs in the 5G Era!
by Daniel Nenni on 01-27-2020 at 6:00 am

New Family of FPGAs Speedster7t

FPGAs, today and throughout the history of semiconductors, play a critical role in design enablement and electronic systems. Which is why we included the history of FPGAs in our book “Fabless: The Transformation of the Semiconductor Industry” and added a new chapter in the 2019 edition on the history of Achronix.

In a recent blog… Read More


Network on Chip Brings Big Benefits to FPGAs

Network on Chip Brings Big Benefits to FPGAs
by Tom Simon on 12-19-2019 at 10:00 am

NAPs provide connection to high speed NoC

The conventional thinking about programmable solutions such as FPGAs is that you have to be willing to make a lot of trade-offs for their flexibility. This has certainly been the case in many instances. Even just getting data across the chip can eat up valuable routing resources and add a lot of overhead. These problems are exacerbated… Read More


New Generation of FPGA Based Distributed Accelerator Cards Offer High Performance and Adaptability

New Generation of FPGA Based Distributed Accelerator Cards Offer High Performance and Adaptability
by Tom Simon on 12-05-2019 at 10:00 am

Achronix FPGA used on BittWare Accelerator Card

We have learned from nature that two characteristics are helpful for success, diversity and adaptability. The same has been shown to be true for computing systems. Things have come a long way from when CPU centric computing was the only choice. Much heavy lifting these days is done by GPUs, ASICs, and FPGAs, with CPUs in a support … Read More


BittWare PCIe server card employs high throughput AI/ML optimized 7nm FPGA

BittWare PCIe server card employs high throughput AI/ML optimized 7nm FPGA
by Tom Simon on 10-31-2019 at 6:00 am

Back in May I wrote an article on the new Speedster7t from Achronix. This chip brings together Network on Chip (NoC) interconnect, high speed Ethernet and memory connections, and processing elements optimized for AI/ML. Speedster7t is a very exciting new FPGA that can be used effectively to accelerate a wide range of processing… Read More


Free webinar – Accelerating data processing with FPGA fabrics and NoCs

Free webinar – Accelerating data processing with FPGA fabrics and NoCs
by Tom Simon on 10-14-2019 at 10:00 am

FPGAs have always been a great way to add performance to a system. They are capable of parallel processing and have the added bonus of reprogramability. Achronix has helped boost their utility by offering on-chip embedded FPGA fabric for integration into SoCs. This has had the effect of boosting data rates through these systems… Read More


Learn About Implementing SmartNICs, an Achronix White Paper

Learn About Implementing SmartNICs, an Achronix White Paper
by Randy Smith on 09-17-2019 at 10:00 am

We have all seen the announcements to provide ever-increasing network capabilities within the data centers.  Enabling these advances are improvements in connectivity including SerDes, PAM4, optical solutions, and many others. It seems 40G is old news now, and the current push is for 400G – things are changing very quickly.… Read More


Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!

Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!
by Daniel Nenni on 08-10-2019 at 6:00 am

As more than 343 people (and counting) know, we will be releasing the 2019 updated PDF version of our first book “Fabless: The Transformation of the Semiconductor Industry” via handout at a live webinar. The response has been overwhelming and I want to personally thank you. The webinar will be a brief overview of the book with a question… Read More


An evolution in FPGAs

An evolution in FPGAs
by Tom Simon on 05-24-2019 at 5:00 am

Why does it seem like current FPGA devices work very much like the original telephone systems with exchanges where workers connected calls using cords and plugs? Achronix thinks it is now time to jettison Switch Blocks and adopt a new approach. Their motivation is to improve the suitability of FPGAs to machine learning applications,… Read More