A tour of Cliosoft’s participation at DAC 2020 with Simon Rance

As chip complexity grows, so does the need for a well-thought-out design data management strategy.  This is a hot area, and Cliosoft is in the middle of it.  When I was at eSilicon, we used Cliosoft technology to manage the design and layout of high-performance analog designs across widely separated design teams. The tool worked great and everyone was always working on the correct version. Over the years I’ve developed an appreciation for the importance of an industrial-grade strategy to manage design data and revisions. And no, spreadsheets and white boards don’t qualify as industrial grade.

I was curious what Cliosoft was up to at DAC this year, so I reached out to an old friend from Atrenta who is the head of marketing at Cliosoft, Simon Rance. It turns out Cliosoft is doing a lot at DAC and Simon took me on a tour of the planned events.

The first one we discussed is a poster session presented with Lawrence Berkeley National Laboratory, Method and Apparatus to Promote Cross-Institution Design Collaboration. This one is certain to take you out of your traditional concept of a design project. The challenges of “high-energy physics project development” will be discussed. Collaboration is quite widespread and Cliosoft provides a master data repository. This data backbone is used by Brookhaven National Laboratory, Fermi National Accelerator Laboratory and Lawrence Berkeley National Laboratory. OK, enough name-dropping. This poster will be presented on Wednesday, July 22 from 7:30 AM to 8:30 AM Pacific time.

Next up is a poster session about designing in the cloud with Amazon Web Services, Efficient & Cost Effective EDA Environment Built Easily in AWS Cloud. First, the challenges of on-premise data centers are discussed:

• Peak-capacity resource planning
• Continuous upgrades of hardware
• Capital expense

A methodology to address these issues using Cliosoft technology is then discussed. Some eye-catching statistics are documented:

• 90 percent disk space savings
• 2 – 3.5X performance gain

Impressive. The methods to achieve these kinds of results are detailed in this presentation. I had some first-hand experience with designing in the cloud at eSilicon and I can tell you the efficiency and flexibility benefits are real. You should check it out. This poster will be presented on Tuesday, July 21 from 7:30AM – 8:30AMPacific time.

Speaking of the cloud, the next poster session we discussed was one with Google, Efficient & Cost Effective EDA Environment Built Easily in Google Cloud.  The challenges cataloged here are:

• Shared storage performance
• Unstable networks

A methodology to replicate your EDA environment in the cloud is discussed. Key items to consider include:

• A wise choice of compute infrastructure
• The cloud compatibility of the software
• Cloud connectivity to all design sites
• Data privacy and retention compliance

The presentation reports a 75 percent improvement in file access on the cloud. This poster will be presented on Tuesday, July 21 from 7:30AM – 8:30AM Pacific time.

The final session I discussed with Simon is a presentation in the technical program at DAC. I can tell you these slots are not easy to get. Each submission goes through a rigorous peer review and only the best ones survive. The presentation is entitled Silicon-Based Quantum Computer Design and Verification.

This is a joint presentation with Cliosoft and Equal1.Labs. Quantum computing is pretty exotic stuff. Equal1.Labs claims to have the first 16 qubit compact quantum computer demonstrator, code named alice mk1. I would definitely catch this one. The presentation is Monday, July 20 from 1:30PM – 3:00 PM Pacific time (session 6.2).

You can register for DAC here.  Enjoy the show.

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