Analog Circuit Migration and Optimization

The MunEDA User Group Meeting (MUGM)  has been an annual event since 2006, and this year there were some 80 participants from many customers that attended to share their experiences and learn how to get the best EDA tool results. I’ve been able to view the presentations and archived videos, so will share some of the interesting successes in specific tool categories.

There were two presentations from engineers at ST Microelectronics on how they performed analog circuit migration and optimization with the help of design automation software. Caroline Vaganay from ST Microelectronics works in their PDK and Design Flows group, and she compared the WiCkeD tool from MunEDA for analog circuit migration versus another vendor across three internal designs.

Their criteria in comparing EDA tools for analog circuit migration were:

• Specification-driven circuit optimization
• Pre-defined corners, statistical corners
• SPICE simulators supported
• Design migration and exploration
• Accuracy – confidence, local minima, feasibility
• Run times
• Usability
• Pricing
• Support

Three circuits were used in their benchmarks:

• OPAMP
• Voltage Reference
• Bandgap

The general design flow for the WiCkeD tool is shown below:

For the OPAMP circuit designed at 0.25um they wanted to look for better trade-off options by improving Vio and Icc across all PVT corners, achieving a PGB > 20 MHz. Optimization results showed that all performance values were within specs at nominal and worst case corners, and the runtime was only 4h 5min to complete 7,455 simulations. The performance robustness improved and the total yield improved from 14% to 71% at worst case conditions.

Their second circuit to optimize was a Voltage Reference Buffer using 40nm technology, with objectives to improve current recopy across PVT corners to minimize any process variation impacts. WiCkeD was directed to change design parameters to reduce the local variation, resulting in standard deviation improvements on performance metrics:

• DELTA_PC_X10 lower, 46%
• DELTA_PC_X10 upper, 44%
• DELTA_PC_X8, lower, 38%
• DELTA_PC_X8, upper, 45.7%

Caroline’s final benchmark circuit was a Bandgap reference in 0.18um, with objectives to optimize the resistor network to get  a minimum compensated curvature over the full temperature range, while showing stability and reaching PSRR, consumption and bandwidth goals.

The WiCkeD  optimizer was able to meet all performance goals and DC conditions in just 8,107 simulations, taking 9h 40min of simulation time. With MunEDA tools they beat other tools by speed and accuracy, finding solutions when others couldn’t.

Schematic Porting Tool – SPT

Maxime Blattes from ST Microelectronics shared his evaluation of SPT, and their steps used to port a schematic were:

• Store parameters from the source schematic
• Find the corresponding devices in a mapping table
• Apply a translation and rotation to the new instance
• Reconnect the wire on the new pins
• Apply parameters to new instances with scaling
• Run update parameters procedure

Their previous flow with Cadence Virtuoso required customization that was difficult for non-CAD engineers, and required a Skill developer. The promise of a porting tool was in saving time and talent. SPT is a GUI-based tool, making it easier for engineers to use quickly for tasks like symbol mapping, property mapping, and automatically extracting a schematic. The longest part of porting before was solving the wire updating issue, now automated with SPT.

Designers that are not CAD engineers can use SPT on their own, create any needed templates quickly, and learning the tool in a short time. What took them just 30 minutes using SPT required about 2 days before using SKILL coding.

A third presentation by Matthias Sylvester of MunEDA was a demo of SPT where he ported an example schematic from 180nm to 90nm of a 3 pin to 3 pin MOS design, then a 3 pin to 4 pin MOS. His main points about SPT for schematic porting were:

• SPT remembers to recalculate all properties
• Uses your hierarchy
• Ports between all process nodes and fabs
• SPT can stretch the new schematic as needed
• Connectivity is checked before and after porting
• SPT was more powerful and convenient than other tools

Summary

Analog circuit migration and optimization can be either a manual or automated process, and the WiCkeD tool from MunEDA has been used for 15 years at companies like ST Microelectronics to automate the process, producing results that are meeting specifications like area, yield, performance and robustness. Yes, analog design is still part art and part engineering, but using EDA automation tools gives your engineers better results in less time than manual methods. The Schematic Porting Tool – SPT, is a fast way to migrate any schematic between nodes and fabs.

Visit MunEDA at the 60th DAC, booth 1407 in Moscone West, July 10-12th.

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