Semiconductors back to growth in 2020

Semiconductors back to growth in 2020
by Bill Jewell on 09-24-2019 at 11:30 am

The global semiconductor market is headed for the largest decline in 18 years. The market dropped 32% in 2001 when the Internet bubble burst. The 2019 decline should be around 15%, the third largest annual drop after 2001 and a 17% drop in 1985. The current weakness is largely due to excess memory capacity (DRAM and NAND flash) relative… Read More


Overcoming Mixed-Signal Design and Verification Challenges in Automotive and IoT Systems

Overcoming Mixed-Signal Design and Verification Challenges in Automotive and IoT Systems
by Daniel Payne on 08-10-2017 at 12:00 pm

At the recent DAC conference in Austin I attended a panel discussion over lunch where engineers from four companies talked about how they approached mixed-signal design and verification challenges for automotive and IoT systems. It seems like 2017 was the year of automotive at DAC, while in 2016 it was all about IoT. Both segmentsRead More


HLS update from Mentor about Catapult

HLS update from Mentor about Catapult
by Daniel Payne on 07-17-2017 at 12:00 pm

I recall back in the late 1980’s when logic synthesis tools were first commercialized, at first they could read in a gate-level netlist from one foundry then output an optimized netlist back into the same foundry. Next, they could migrate your gate-level netlist from Vendor A over to Vendor B, giving design companies some… Read More


Semiconductors flat for second straight year

Semiconductors flat for second straight year
by Bill Jewell on 12-20-2016 at 4:00 pm

The global semiconductor market posted strong 11.6% growth in 3[SUP]rd[/SUP] quarter 2016 from 2[SUP]nd[/SUP] quarter, according to WSTS. This strength is reflected in the 3[SUP]rd[/SUP] quarter revenue growth reported by the major semiconductor suppliers. Of the 12 companies, half (Intel, Samsung, Broadcom, TI, Micron… Read More


2016 semiconductor capex highest in 5 years

2016 semiconductor capex highest in 5 years
by Bill Jewell on 10-25-2016 at 4:00 pm

Global semiconductor capital expenditures (capex) are expected to return to the level of 2011 either this year or next. 2011 was the record year for capex as the industry returned to growth following the 2009-2010 recession. IC Insights’ August 2016 forecast called for 3.5% growth in capital spending to reach $67.1 billion, the… Read More


Semiconductors negative in 2016, positive in 2017

Semiconductors negative in 2016, positive in 2017
by Bill Jewell on 08-17-2016 at 12:00 pm

Note: the table and text below have been revised from an earlier post to correct the numbers for STMicroelectronics.

Semiconductor companies posted a wide range of results in 2nd quarter 2016. Intel, Micron Technology and Renesas Electronics all had declines in revenue in 2Q 2016 versus 1Q 2016. Samsung Semiconductor, Qualcomm… Read More


Circuit Simulation Panel Discussion at #53DAC

Circuit Simulation Panel Discussion at #53DAC
by Daniel Payne on 06-29-2016 at 12:00 pm

Four panelists from big-name semiconductor design companies spoke about their circuit simulation experiences at #53DAC in Austin this year, so I attended to learn more about SPICE and Fast SPICE circuit simulation. I heard from the following four companies:… Read More


SRAM Optimization for 14nm and 28nm FDSOI

SRAM Optimization for 14nm and 28nm FDSOI
by Daniel Payne on 05-16-2016 at 4:00 pm

I’ve done SRAM and DRAM design before as a circuit designer from 1978-1986, but in 2016 there are so many more challenges to using 28nm and 14nm on FDSOI technology. One way to keep abreast of SRAM design is to read conference papers, so I just finished a paper from authors at STMicroelectronics and MunEDA presented at the IEEE… Read More


In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April

In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April
by Adele Hars on 04-02-2016 at 7:00 am

If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More


Design and Optimization of Analog IP is Possible

Design and Optimization of Analog IP is Possible
by Daniel Payne on 12-04-2015 at 7:00 am

Designing Analog IP is often referred to as a “black art”, something that only highly experienced craftsmen can produce using transistor-level techniques that aren’t shared outside of their closely held group of trusted co-workers. I’d like to suggest that Analog IP can be designed and optimized … Read More