Handel Jones on FD-SOI vs FinFET

Handel Jones on FD-SOI vs FinFET
by Paul McLellan on 03-20-2014 at 1:27 am

Handel Jones has a new white-paper out titled Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets. Handel has done an in-depth analysis of the wafer and die costs of the various approaches, bulk planar (what we have been doing up to now), FD-SOI and FinFET. The analysis… Read More


A Brief History of STMicroelectronics

A Brief History of STMicroelectronics
by Daniel Nenni on 02-27-2014 at 10:00 am

STMicroelectronics is the result of the 1987 marriage between famed semiconductor companies SGS Microelettronica of Italy and Thomson-CSF Semiconductor of France. You may recognize the name SGS-Thomson which was replaced by STMicroelectronics in 1998. After the merger SGS-Thomson was ranked as number 14 in the top 20 semiconductor… Read More


Why SOI is the Future Technology of Semiconductor

Why SOI is the Future Technology of Semiconductor
by Eric Esteve on 01-14-2014 at 8:34 am

No doubt that FDSOI generate high interest these days and I found a very interesting contribution from Zvi Or-Bach, President and CEO of MonolithIC 3D, Inc. Zvi has accepted to share his wrap-up from IEDM, in a blog for Semiwiki readers. If you remember the long discussion we had in Semiwiki about cost comparison, some comments were… Read More


Cadence Grows VIP Business – What’s New?

Cadence Grows VIP Business – What’s New?
by Pawan Fangaria on 10-04-2013 at 10:00 am

VIPs (Verification IPs) are really important in this complex world of SoCs which involve various IPs, interfaces and continuously evolving protocols and standards, thus making the task of verifying an overall system extremely challenging. And the verification must be done in minimum possible run-time and memory consumption.… Read More


ST Endorses PowerArtist with ARM Cores & FDSOI libs

ST Endorses PowerArtist with ARM Cores & FDSOI libs
by Pawan Fangaria on 10-01-2013 at 12:00 pm

It was an interesting webinar I attended, presented by STMicroelectronicson how they are benefited in power saving and thermal dissipation by using FDSOI technology and also by using PowerArtist in their design. So, it’s an advantage from both sides – semiconductor technology and semiconductor design tool. It’s worth attending… Read More


RTL Power Estimation at DAC

RTL Power Estimation at DAC
by Daniel Payne on 05-17-2013 at 7:22 pm

If you design with ARMCores and need to estimate dynamic power early in the flow, then consider what STMicroelectronics has done with their high performance, power-efficient subsystems. Anne Merlande is a Processor Micro Architecture technical expert, and will be presenting in Booth #1346 at DACon June 4th, 2:00PM. Her topic… Read More


SPICE Circuit Simulation at STMicroelectronics

SPICE Circuit Simulation at STMicroelectronics
by Daniel Payne on 02-20-2013 at 11:18 am

At the 2010 DACI moderated a panel session on SPICE and Fast SPICE circuit simulation, and one of the panelists was PierLuigi Dagliofrom STMicroelectronics. To get an update on SPICE circuit simulation at ST I read a PDF document at Mentor titled: Improving the Quality of SPICE Simulation Results with Eldo Premier at ST.


ST does … Read More


Semiconductors Down 2.7% in 2012, May Grow 7.5% in 2013

Semiconductors Down 2.7% in 2012, May Grow 7.5% in 2013
by Bill Jewell on 02-06-2013 at 10:29 pm

Guidance 1Q13 292x300

The world semiconductor market in 2012 was $292 billion – down 2.7% from $300 billion in 2011, according to WSTS. The 2012 decline followed a slight gain of 0.4% in 2011. Fourth quarter 2012 was down 0.3% from third quarter. The first quarter of the 2013 will likely show a decline from 4Q 2012 based on typical seasonal patterns and theRead More


How ST-Ericsson Improved DFM Closure using SmartFill

How ST-Ericsson Improved DFM Closure using SmartFill
by Daniel Payne on 10-07-2011 at 2:38 pm

DFM closure is a growing issue these days even at the 45nm node, and IC designers at ST-Ericsson have learned that transitioning from dummy fill to SmartFill has saved them time and improved their DFM score.

The SOC
ST-Ericsson designed an SOC for mobile platforms called the U8500 and their foundry choice was a 45nm node at STMicroelectronicsRead More