This will be my 30[SUP]th[/SUP] Design Automation Conference. I know this because my first DAC was the same year I got married and forgetting how many years you have been married can cost you half your stuff. I have known Cliff Hou for half of that time and he has proven to be one of the most humble and honorable men I have worked with, definitely.… Read More
Intel 14nm Delayed Again?
From the sources in which I confirmed the last Intel 14nm delay, I just confirmed another. Intel 14nm is STILL having yield problems. Remember Intel bragging about 14nm being a full node and deriding TSMC because 16nm is “just” 20nm with FinFETs added? Judging by the graph, clearly FinFETs are not the problem here. … Read More
Designing an SoC with 16nm FinFET
IC designers contemplating the transition to 16nm FinFET technology for their next SoC need to be informed about design flow and IP changes, so TSMC teamed up with Cadence Design Systems today to present a webinar on that topic. I attended the webinar and will summarize my findings.
Shown below is a 3D layout concept of an ideal FinFET… Read More
The Great Wall of TSMC
TSMC doesn’t just sell wafers, it sells trust. It’s the Colgate Ring of Confidence for fabless customers. This focus on trust started at the very beginning when Morris Chang founded TSMC over 25 years ago, and still today trust remains an essential part of their business.
When TSMC started, the big thing it brought … Read More
Why Intel 14nm is NOT a Game Changer!
On one hand the Motley Fool is saying, “Intel 14nm could change the game” and on the other hand the Wall Street Cheat Sheet is saying, “Intel should shut down mobile”. SemiWiki says Intel missed mobile and should look to the future and focus on wearables and in this blog I will argue why.
Let’s look back to 2009 when Intel and TSMC signed… Read More
RTL Sign-off – At an Edge to become a Standard
Ever since I have seen Atrenta’s SpyGlass platform providing a comprehensive set of tools across the semiconductor design paradigm, I felt the need for a common set of standards to evolve for sign-off at RTL level. Last December, when I read an EE Times articleof Piyush Sancheti, VP, Product Marketing at Atrenta, where he talks … Read More
The Changing Semiconductor Foundry Landscape!
The foundry landscape is changing again and it is definitely something that should be discussed. There are some people, mostly influenced by Intel, that feel the foundry business has hit the wall at 20nm which couldn’t be further from the truth. After spending 30 years working in Silicon Valley, I have experienced a lot of change… Read More
TSMC OIP presentations available!
Are you a TSMC customer or partner? If so, you’ll want to take a look at these presentations from the 2013 TSMC Open Innovation Platform conference:
- Design Reliability with Calibre YE-SmartFill and Calibre PERC (Broadcom & Mentor Graphics)
New methodologies were developed for 28nm designs using Calibre SmartFill and Calibre
TSMC projects $800 Million of 2.5/3D-IC Revenues for 2016
At TSMC’s latest earnings call held mid January 2014, an analyst asked TSMC for a revenue forecast for their emerging 2.5/3D product line. C.C. Wei, President and Co-CEO answered: “800 Million Dollars in 2016 ”. TSMC has demonstrated great vision many times before. For me, an enthusiastic supporter of this technology, this statement… Read More
Is Altera Leaving Intel for TSMC?
There is a rumor making the rounds that Altera will leave Intel and return to TSMC. Rumors are just rumors but this one certainly has legs and I will tell you why and what I would have done if I were Altera CEO John Daane. Altera is a great company, one that I have enjoyed working with over the years, but I really think they made a serious mistake… Read More