With the uncertainties around timing of 450mm wafers, EUV (whether it works at all and when) and new transistor architectures it is unclear whether Moore’s law as we know it is going to continue, and in particular whether the cost per transistor is going to remain economically attractive especially for consumer markets … Read More
Save the Dates
There are several events in Silicon Valley coming up of general interest to people working in EDA and the semiconductor industry.
SEMI 16th Annual Valley Lunch Forum. August 22nd, 11.30am to 1.30pm, Santa Clara Marriott
- What are the Opportunities for Advanced Semiconductor Devices?
- Where will the year end for 2013?
- Will we have
SEMICON Taiwan 3D
SEMICON Taiwan is September 3rd to 6th in TWTC Nangang Exhibition Hall. Just as with Semicon West in July in San Francisco, there is lots going on. But one special focus is 3D IC. There is a 3DIC and substrate pavilion on the exhibit floor and an Advanced Packaging Symposium. Design tools, manufacturing, packaging and testing solutions… Read More
Epitaxy: Not Just For PMOS Anymore
At Semicon I met with Applied Materials to learn about epitaxy. This is when a monocrystalline film is grown on the substrate which takes on a lattice structure that matches the substrate. It forms a high purity starting point for building a transistor and is also the basis of the strain engineering in a modern process.
Since holes… Read More
Semicon: Multiple Patterning vs EUV, round #2
Round #1 was here.
In the EUV corner were Stefan Wurm of Sematech (working on mask issues mostly) and Skip Miller of ASML who are the only company making EUV steppers (and light sources, they acquired Cymer).
You may know that the biggest issue in EUV is getting the source brightness to have high enough energy that an EUV stepper has … Read More
Semicon: Multiple Patterning vs EUV, round #1
If you want to know the state of play in lithography, there is no better place than the special session on lithography at Semicon West. This year was no exception. The session was given the punchy title Still a tale of 2 paths: multi-patterning lithography at 20nm and below: EUVL source and infrastructure progress.
In the blue corner… Read More
Should the Design Automation Conference Colocate with SEMICON West?
My friend and fellow blogger Kurt Shuler wrote recently, “DAC Is Dead? Long Live DAC!”, which is worth a click over. In addition to providing a nice attendance graph and the top three reasons why it is NOT all rosy, Kurt suggests colocating DAC with other conferences (DESIGN West) but fails to mention SEMICON West.
SEMICON West is … Read More
Free Pass to SEMICON West!
SEMICON West is next week, July 9-11 in San Francisco. If you haven’t signed up, and want to attend for free instead of $100,
1) Send an email to silicon_test@mentor.com with subject line “Semicon pass.”
2) Register for SEMICON West
3) After registering, download the SEMICON West mobile app and start building your schedule. Here… Read More
SEMICON West: My Top Picks
I will be at Semicon West from 9th to 11th July in Moscone, San Francisco. Of course there are lots of interesting sessions but here are two that I think are especially important to get a good impression of the way things are going in the future from experts. The two most interesting questions about the future are what comes after 14nm,… Read More
What does 3D IC, FinFETs, and EUV have in common?
They are three of the top trending terms on SemiWiki and three of the hot topics at this year’s Semicon West:
In its 43rd year, SEMICON West is the flagship annual event for the global microelectronics industry. It is the premier event for the display of new products and technologies for microelectronics design and manufacturing,… Read More

