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Richard Goering is well-known from his editorial days at EE Times (going back some 25 years), now at Cadence he blogs at least once a week on EDA topics that touch Cadence tools.
Before DAC he talked with Srinath Anantharaman about how Cadence tools work together with ClioSoft tools to keep IC Design Data Management Simple.
Through… Read More
Show me what has changed in my RTL or Schematic since the last time I looked. This task is now automated by Cliosoft with their new hierarchical tool called Visual Design Difference (VDD). Srinath showed me what was new for DAC.
LSI, STMicro – use DesignSync for their DM but use VDD for seeing visual… Read More
Cadence and ClioSoft made a webinar recently and I’ll summarize what I learned from it.
What’s New from Cadence in Virtuoso 6.1.5
- Back2Basics (28nm rule integration, Skill improved with object-oriented, OASIS support, HTML Publisher, Waveform re-written for better Analog support, smaller Waveform
… Read More
Here in the Silicon Forest (Oregon) we have a venture-backed, fabless analog semi company called Avnera that has designed over 10 Analog System on Chips (ASoC). Their chips are used in consumer products for both wireless audio and video applications.
James Rollins is the director of physical design at Avnera and … Read More
On Friday I talked with Srinath Anantharaman by phone to gain some perspective on Hardware Configuration Management (HCM) versus Software Configuration Management (SCM), especially as it applies to the IC design flows in use today. In the 1990’s we both worked at Viewlogic in Fremont, CA and in 1997 Srinath founded… Read More