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For those of you following the latest developments in electronic design it has become clear that the industry is transitioning through an inflection point that is shifting some of the ground rules of design. The increase in the speed and integration density in today’s systems are blurring the lines between chip design and system… Read More
At advanced nodes such as 7 and 5nm, timing closure and sign off are becoming much more difficult than before at 16nm. One area of chips that has increased in complexity dramatically and who’s correct operation is essential for silicon success is the clock tree. If the clock tree has excessive jitter, it will throw off every timing… Read More
Optical engineers rely on Ansys SPEOS to deliver extreme product innovation — and NVIDIA dramatically accelerates the development cycle
Product autonomy, artificial intelligence, the Internet of Things (IoT) and other challenging trends are placing new demands on optical engineers in the automotive, aerospace and general… Read More
Background
Traditionally, the interface between chip designers and system power, packaging, reliability, and mechanical engineering teams was a relatively straightforward exchange of specifications. Chip designers developed preliminary power dissipation estimates, often based on a simplifying power/mm**2 value. … Read More
I would contend there is no job quite like working as a support engineer for a simulation tool like Ansys HFSS. Such a role forces an engineer to understand technology in breadth and depth like no other because HFSS is applied to such a broad range of applications and products throughout the world. My own introduction to HFSS began … Read More
In the race to get people out of the driver’s seat, the developers of autonomous vehicles (AV) and advanced driving assistance systems (ADAS) have gone off road and into the virtual world.
Using simulation to design, train and validate the brains behind self-driving cars — the neural networks of sensors and systems that perceive… Read More
So you’ve decided to buy a new car? First you need to research, compare, and test drive before you finally get to drive that shiny new car home. Engineering teams choosing their preferred electromagnetic analysis tool face similar challenges. Historically, electromagnetic problems and analysis tools were relegated to a few … Read More
For years, there have been rather distinct domains for the extraction of interconnect models from physical design data.
Chip designers commonly focused on RC parasitics for circuit/path delay calculations and dynamic I*R voltage drop analysis. The annotation of extracted parasitics to a netlist model required the layout… Read More
Electromagnetic (EM) simulations have been performed on die metal structures since the 1990s. Originally, the analysis was restricted to a single device (e.g., a spiral inductor). The number of on-die devices simulated simultaneously grew with the increasing capabilities of the computers performing the computations. This… Read More
The move from single-chip design to system-in-package design has created many challenges. The rise of 2.5D and 3D technology has set the stage for this. Beyond the modeling requirements and the need for ecosystem collaboration to get those models, there is a significant challenge in understanding the data. The only way to truly… Read More
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