You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please,
join our community today!
WP_Term Object
(
[term_id] => 34
[name] => Ansys, Inc.
[slug] => ansys-inc
[term_group] => 0
[term_taxonomy_id] => 34
[taxonomy] => category
[description] =>
[parent] => 157
[count] => 260
[filter] => raw
[cat_ID] => 34
[category_count] => 260
[category_description] =>
[cat_name] => Ansys, Inc.
[category_nicename] => ansys-inc
[category_parent] => 157
[is_post] =>
)
WP_Term Object
(
[term_id] => 34
[name] => Ansys, Inc.
[slug] => ansys-inc
[term_group] => 0
[term_taxonomy_id] => 34
[taxonomy] => category
[description] =>
[parent] => 157
[count] => 260
[filter] => raw
[cat_ID] => 34
[category_count] => 260
[category_description] =>
[cat_name] => Ansys, Inc.
[category_nicename] => ansys-inc
[category_parent] => 157
[is_post] =>
)
ESD has historically been a big problem analyzed with ad-hoc approaches. As explained earlier, this is no longer an adequate way to plan nor signoff ESD protection.
Pathfinder is the first full-chip comprehensive ESD planning and verification solution. It is targeted to address limitations in today’s methodologies.… Read More
Electro-static discharge (ESD) has been a problem since the beginning of IC production. Chips function on power supplies of up to a few volts (depending on the era) whereas ESD voltages are measured in the thousands of volts. When you reach out for your car door handle and a spark jumps across, that is ESD. If you were touching a chip… Read More
As the complexity of the chip-package-system (CPS) interactions has increased, the tradeoffs in doing a power and noise analysis has had to gradually increase. As is so often the case in semiconductor designs, issues first arise as second-order effects that can largely be ignored but each process node makes the problem worse … Read More
Apache at DACby Paul McLellan on 05-04-2011 at 2:38 pmCategories: Ansys, Inc., EDA
DAC is less than a month away, June 6-8th for the tradeshow, longer depending on what other events you might also be attending. Apache is in booth 2448 (marked in red on the DAC floorplan map.
Many of the presentations at the Apache booth will be customers (such as ARM, Xilinx, ST Ericsson, GlobalFoundries and TSMC) discussing various… Read More
Power has become the strongest driver of semiconductor design today, more important than area, more important than timing. Whether the device is handheld, like a wireless phone, or tethered, like a router, complex power and energy requirements must be met. Shrinking geometries continue to impose new challenges as power management… Read More
I can still remember the time, back in the mid-1980s, when I was at VLSI and we first discovered that we were going to have to worry about package pin inductance. Up until then we had been able to get away with a very simplistic model of the world since the clock rates weren’t high enough to need to worry about the package and PCB as… Read More
Yesterday at the Globalpress electronic summit Andrew gave an overview of the Apache product line, carefully avoiding saying anything he cannot due to the filing of Apache’s S-1. From a financial point of view the company has had 8 years of consecutive growth, is profitable since 2008, and has no debt. During 2010 when the… Read More
Apache Design Solutions today filed their S-1 with the SEC in preparation for its initial public offering (IPO). This is a big deal since there hasn’t been an IPO of an EDA company for may years (Magma was the last 10 years ago). As a private company they have not had to reveal their financials until now.
It turns out that they did… Read More