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FD-SOI: 20nm Performance at 28nm Cost

FD-SOI: 20nm Performance at 28nm Cost
by Paul McLellan on 07-28-2014 at 8:01 am

There has been a lot of controversy about whether FD-SOI is or is not cheaper to manufacture than FinFET. Since right now FinFET is a 16nm process (22nm for Intel) and FD-SOI is, for now, a 28nm process it is not entirely clear how useful a comparison this is. Scotten Jones has very detailed process cost modeling software (that is what semiconductor companies pay him for) and so I think his costs are probably very close to the truth. But the bottom line isn’t very interesting, neither process seems to have any sort of compelling cost advantage.

However, some interesting factoids have come to light from unlikely sources. First, the CSPA (Chinese Semiconductor Professionals Association) meeting a couple of weekends ago that Semiwiki’s Dan Nenni (嫩以但) attended. Samsung’s Kelvin Lo presented about Samsung’s foundry strategy. Remember, just before DAC, Samsung announced that it was licensing FD-SOI from ST. At DAC I attended a presentation from Philippe Margashack of ST on the Samsung booth.

Kelvin presented mobile as being 20nm and 14nm, networking as 14nm, and Internet of things (IoT) as 28nm. He said that 28nm is the sweet spot, both because of exploding design costs and because of increasing transistor costs. Clearly, Samsung thinks that 20nm transistors will cost more than 28nm transistors per transistor. Actually this data is Handel Jones’s but the fact that Samsung presented it presumably means they believe it. But don’t forget Samsung doesn’t have a 20nm process.

He presented 28nm FD-SOI as low-power, high-performance, 20nm performance at 28nm cost with PDK, libraries, IP and EDA tool-flow already available.

Then during the Cadence quarterly conference call FD-SOI came up a couple of times. Here is what Lip-Bu said:Clearly, we are engaging with our foundries based on the customer requirements. So we work very intensively with our customer. If the customer decided to go advanced node in FinFET we support them to with the foundry partners. If they decided to move on to the FDSOI, we clearly support that. In my remarks, I mentioned about the DDR4, because of customer requirements, moving to the FDSOI process, and we definitely support and enable that.

 So Cadence is migrating at least some of its IP portfolio to FD-SOI. Of course that might just be for STM so might not be a significant datapoint since we know ST is committed to FD-SOI.

Perhaps more interesting was Lip-Bu’s response to a question about FinFET and FD-SOI and whether, as “FinFET gets delayed more” there is a move to FD-SOI.And so a couple of our key customers requested us to support them. And that’s why we have more than 25 new FinFET design projects with our leading customer. And in Q2, we see the development activity increased a lot on that. And then saying that, you know, we also had a couple of customers decide to use the FDSOI for the 28 and 20 and then some go beyond that. So I think we are open minded, and we don’t have any buyers, one way or the other.

Well, that hardly qualifies as a clear answer, especially the last sentence that could mean there is activity below 20nm in FD-SOI or maybe not. Ruben Roy of Piper Jaffrey was as confused as me so he asked a follow up question:You talked about 20 nanometer. I’m wondering, recently with some of the activity that you’re seeing out there, has there been discussions or requests to you to start thinking about and creating libraries for 14 nanometer FDSOI?

And this time Lip-Bu was less ambiguous:The answer to you is yes. We have customers request that. We are working with them. And so clearly, supporting the customer success is the most important for us. Make sure that our tools and IP optimized for that process and that approach. And clearly, the customer has demand us for doing it. Clearly we are supporting that, and so to answer your question, yes, there is an increase in the activity of FDSOI.

Despite the clear answer, I’m not sure it is true. As far as I know, nobody has PDKs for a 14nm FD-SOI process, which is precursor to developing libraries and IP for it. At Semicon, ST presented about 14nm FD-SOI (planar) but it seemed very preliminary. Even 20nm isn’t ready for prime-time (or PrimeTime!) yet. All FD-SOI activity, as far as I know, starts at ST and then is licensed to Samsung and, perhaps, GlobalFoundries so that is where it is happening if it really is that far along.


More articles by Paul McLellan…


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