The Future of Verification Management

The Future of Verification Management
by Bernard Murphy on 03-29-2018 at 7:00 am

One of the great aspects of modern hardware verification is that we keep adding new tools and methodologies to support different verification objectives (formal, simulation, real-number simulation, emulation, prototyping, UVM, PSS, software-driven verification, continuous integration, …). One of the downsides to this… Read More


IP-SoC 2016: IP Innovation, Foundries, IoT and Security

IP-SoC 2016: IP Innovation, Foundries, IoT and Security
by Eric Esteve on 11-10-2016 at 7:00 am

The next IP-SoC conference will be held in Grenoble, France, on December 6-7, 2016 after Shanghai in September and Bangalore, India, in April. This will be the 20[SUP]th[/SUP] edition of this unique IP centric event, as well as the celebration of Design And Reuse 20[SUP]th[/SUP] anniversary. Creating in 1997 a company fully dedicated… Read More


Highlights of the 28nm FD-SOI San Jose Presentations

Highlights of the 28nm FD-SOI San Jose Presentations
by Adele Hars on 06-05-2016 at 8:00 pm

Most of the presentations from the FD-SOI Symposium in San Jose last month (April 2016) are now available on the SOI Consortium website (click here to see the full list — if they’re posted, you can download them freely from there). If you don’t have time to wade through them all, here are some of the highlights. … Read More


Semiconductor capital spending consolidating

Semiconductor capital spending consolidating
by Bill Jewell on 12-14-2015 at 10:00 pm

Shipments of semiconductor wafer fab equipment are expected to grow 2.5% in 2016 after 0.5% growth in 2015 according to the December forecast from Semiconductor Equipment and Materials International (SEMI). Gartner is more pessimistic, with its October forecast calling for fab equipment to decline 0.5% in 2015 and drop 2.5%… Read More


UTBB SOI can scale down to 5nm says Skotnicki…

UTBB SOI can scale down to 5nm says Skotnicki…
by Eric Esteve on 07-29-2015 at 12:00 am

…and FinFET down to 3nm. This assertion is the result of extensive research work made by Thomas Skotnicki, ST Fellow and Technical VP, Disruptive Technologies, leading to numerous publications, like in 1988 in IEEE EDL or in 2008 in IEEE TED paper. I say extensive, I should also say long, very long, as it took almost 30 years for the… Read More


Thomas Skotnicki: FD-SOI 26 Years in the Making

Thomas Skotnicki: FD-SOI 26 Years in the Making
by Paul McLellan on 07-23-2015 at 7:00 am

Image RemovedIt seems to be FD-SOI week yet again. I talked to Thomas Skotnicki this morning. He is the father of thin-box FD-SOI and its birth is an interesting story. The story began 26 years ago (so not quite as far back as the photo!).

Thomas is of Polish origins (he is actually Tomeczek) and grew up in Warsaw where he earned his PhD.… Read More


Why Intel will Never Succeed in IoT Market?

Why Intel will Never Succeed in IoT Market?
by Eric Esteve on 05-02-2015 at 4:18 am

Let me precise that by “IoT” I think about the IoT devices market, made of hundreds of application, wearable gadget to medical, home automation, and so on. One direct consequence of IoT (device) market explosion will be the strong growth of the server market (cloud), to transfer, compute and store information generated by the billions… Read More


Grenoble Comes to San Francisco

Grenoble Comes to San Francisco
by Paul McLellan on 04-14-2015 at 7:00 am

Image RemovedThe headquarters of ST Microelectronics is officially in Switzerland, but in many ways the center of gravity is in the Grenoble area. You may have heard of Crolles where ST does process development, manufacturing and more, which is about ten miles north-east of the city. As a result, along with the CEA-LETI and Grenoble… Read More


WTL Leverage FDSOI to Achieve Both Low Power AND High Speed

WTL Leverage FDSOI to Achieve Both Low Power AND High Speed
by Eric Esteve on 10-07-2014 at 11:46 am

In fact, this is the title of a presentation given by Pete Foley during FD-SOI Forum 2014 held in Shanghai, a couple of weeks ago. What is nice with clever people like Pete Foley is that they get the point, and get it quickly. Getting the point is to insert AND in capital in the title, as using FD-SOI technology allows to benefit from low-power… Read More


FD-SOI: 20nm Performance at 28nm Cost

FD-SOI: 20nm Performance at 28nm Cost
by Paul McLellan on 07-28-2014 at 8:01 am

There has been a lot of controversy about whether FD-SOI is or is not cheaper to manufacture than FinFET. Since right now FinFET is a 16nm process (22nm for Intel) and FD-SOI is, for now, a 28nm process it is not entirely clear how useful a comparison this is. Scotten Jones has very detailed process cost modeling software (that is what… Read More