Powering eMobility Through Silicon-Carbide Substrates

Powering eMobility Through Silicon-Carbide Substrates
by Bernard Murphy on 10-25-2023 at 6:00 am

SOITEC SEPTEMBRE 2023

While writing on infotainment and ADAS I sometimes wonder about the devices that make an EV run. These have nothing to do with digital or software wizardry. While logic and software play a role, the real heart of EV power is in power electronics driving motors, regenerative braking and charger options at home and on the road. Technologies… Read More


Qualcomm Insights into Unreachability Analysis

Qualcomm Insights into Unreachability Analysis
by Bernard Murphy on 10-17-2023 at 6:00 am

Unreachability

Unreachability (UNR) analysis, finding and definitively proving that certain states in a design cannot possibly be covered in testing, should be a wildly popular component in all verification plans. When the coverage needle stubbornly refuses to move, where should you focus testing creativity while avoiding provably untestable… Read More


Synopsys Panel Updates on the State of Multi-Die Systems

Synopsys Panel Updates on the State of Multi-Die Systems
by Bernard Murphy on 10-12-2023 at 6:00 am

multi die 525x315 light

Synopsys recently hosted a cross-industry panel on the state of multi-die systems which I found interesting not least for its relevance to the rapid acceleration in AI-centric hardware. More on that below. Panelists, all with significant roles in multi-die systems, were Shekhar Kapoor (Senior Director of Product Management,… Read More


Can Generative AI Recharge Phone Markets?

Can Generative AI Recharge Phone Markets?
by Bernard Murphy on 10-09-2023 at 10:00 am

Consensus on smartphone markets hovers somewhere between slight decline and slight growth indicating lack of obvious drivers for more robust growth. As a business opportunity this unappealing state is somewhat offset by sheer volume ($500B in 2023 according to one source) but we’re already close to peak adoption outside of … Read More


Assertion Synthesis Through LLM. Innovation in Verification

Assertion Synthesis Through LLM. Innovation in Verification
by Bernard Murphy on 09-28-2023 at 6:00 am

Innovation New

Assertion based verification is a very productive way to catch bugs, however assertions are hard enough to write that assertion-based coverage is not as extensive as it could be. Is there a way to simplify developing assertions to aid in increasing that coverage? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl … Read More


Fast Path to Baby Llama BringUp at the Edge

Fast Path to Baby Llama BringUp at the Edge
by Bernard Murphy on 09-26-2023 at 10:00 am

Baby Llama min

Tis the season for transformer-centric articles apparently – this is my third within a month. Clearly this is a domain with both great opportunities and challenges: extending large language model (LLM) potential to new edge products and revenue opportunities, with unbounded applications and volumes yet challenges in meeting… Read More


Cadence Tensilica Spins Next Upgrade to LX Architecture

Cadence Tensilica Spins Next Upgrade to LX Architecture
by Bernard Murphy on 09-21-2023 at 6:00 am

Xtensa LX8 processor

When considering SoC architectures it is easy to become trapped in simple narratives. These assume the center of compute revolves around a central core or core cluster, typically Arm, more recently perhaps a RISC-V option. Throw in an accelerator or two and the rest is detail. But for today’s competitive products that view is a … Read More


Inference Efficiency in Performance, Power, Area, Scalability

Inference Efficiency in Performance, Power, Area, Scalability
by Bernard Murphy on 09-19-2023 at 6:00 am

AI graphic

Support for AI at the edge has prompted a good deal of innovation in accelerators, initially in CNNs, evolving to DNNs and RNNs (convolutional neural nets, deep neural nets, and recurrent neural nets). Most recently, the transformer technology behind the craze in large language models is proving to have important relevance at… Read More


Chiplets and IP and the Trust Problem

Chiplets and IP and the Trust Problem
by Bernard Murphy on 09-12-2023 at 6:00 am

Trust min

Perforce recently hosted a webinar on “IP Lifecycle Management for Chiplet-Based SoCs”, presented by Simon Butler, the GM for the Methodics IPLM BU. The central theme was trust, for IPs as much as chiplets. How can an IP/chiplet consumer trust that what they receive has not been compromised somewhere in the value chain from initial… Read More


Mixed Signal Verification is Growing in Importance

Mixed Signal Verification is Growing in Importance
by Bernard Murphy on 09-07-2023 at 6:00 am

Mixed signal min

I have historically avoided mixed signal topics, assuming they decouple from digital and can be left to the experts. That simple view no longer holds water. Analog and digital are becoming more closely linked through control loops and datapaths, requiring a careful balancing act in verification between performance, accuracy… Read More