Webinar: Choosing IP for your next IoT Design

My favorite IoT device is a cycle-computer from CatEyeand it has GPS for tracking my bike routes, and an LCD display that shows me speed, cadence, heart rate and time. After each ride I connect my CatEye device to a USB connector, upload my data to Strava.com, and then see how I’m doing versus other cyclists and my own personal records. This computer holds a charge of some 12 hours, doesn’t require any phone to operate, and is wireless, so you don’t see any wires stringing around my bike frame. Even the heart sensor is wireless, thanks to bluetooth.

I can only imagine the kind of IP that CatEye and other companies must choose to get their products to market quickly and capture the loyalty of consumers looking to get and stay healthy. The folks at eSiliconinvited me to a webinar last week on the topic of IP and IoT designs, and I learned quite a bit. Analysts estimate that the IoT market could create $300B to $19T in revenue with 25B to 100B devices by 2020. Segments for IoT devices and services include opportunities for many semiconductor products in diverse markets:

• Connected Vehicles
• Healthcare
• Smart Homes
• Wearable
• Computing
• Industrial Internet
• Communications
• Smart Cities

Depending on the IoT application you could use a range of process technologies from 180 nm all the way down to 14/16 nm, it all depends on the power, performance and area required.

Related – IP for IoT: Thanks for the Memory

Microcontrollers are often used in IoT devices and you can select the best MCU by choosing from 8 to 64 bits, clock speed, embedded FLASH, OS, radios, and process nodes.

What eSilicon has to offer your IoT team are ASIC design services along with IP. They have online tools for multi-project wafers, IP libraries, and tracking of manufacturing. They use their own IP for client designs that require ultra low voltage (ULV) and ultra low power (ULP). IP blocks for IoT devices include:

• ULP/ULF SRAM & ROM
• Pseudo DP SRAM
• Low leakage SRAM
• 65 nm, 55 nm, 40 nm, 28 nm
• Planar CMOS and FDSOI technologies

Related – eSilicon Just Taped-out a SonicsGN-based SoC. And it’s not a Secret

For high-performance networking, communications and networking devices their IP blocks are:

• TCAM
• Multi-port & Asynchronous Register Files
• SRAM, ROM
• Memory PHYs and interposer design
• 28 nm, 16 nm, 14 nm, 10 nm
• Planar CMOS and FDSOI technologies

Requirements for IP that are both ULV and ULP are not met with the standard IP offered by most vendors and foundries at the 28 nm node, so eSilicon has IP and the ability to customize the IP to meet the needs. One client chip that eSilicon designed was in 28 nm technology, had 16.84 million gates and used about 42 Mb of memory. They were able to analyze and optimize the IP to show an 8X reduction in standby power and 20X improvement in idle power by using customized IP.

For a Medical IoT application eSilicon was able to provide a 40 nm Single Port SRAM that was not available anywhere else:

Another specialty SRAM instance was for a 1K x 24 size operating at just 720 mV and 36 MHz, using 55/65 nm technology.

Related – IP Market at your Desk!

Ternary CAMs are used in high-performance networking applications in the Cloud, and eSilicon has created a family of CAM compilers to work with multiple technologies.

Summary
For IoT designs you can get to market more quickly by re-using specialized IP or even consider using ASIC design services from a company like eSilicon. View the entire 35 minute webinar online for more details.