Webinar: The “bridge” to scale for AI and HPC applications

Webinar: The “bridge” to scale for AI and HPC applications
by Admin on 10-14-2026 at 11:44 pm

Designing high-performance multi-chiplet semiconductor packages for hyperscale, HPC and AI applications combines cutting-edge innovation with practical optimization. Embedded silicon bridge substrates enable cost-effective solutions by using base substrates such as organic laminates or redistribution-layer (RDL)… Read More

Webinar: Unveiling IC-star: Full-Flow Autonomy from Digital to Analog

Webinar: Unveiling IC-star: Full-Flow Autonomy from Digital to Analog
by Admin on 09-28-2026 at 2:15 am

About this Webinar

Unveiling IC-star: Full-Flow Autonomy from Digital to Analog

October 29, 2026 | 10:00 AM PDT / 1:00 PM EDT

Building a leading-edge chip can take 18 months and cost more than $1 billion, while the AI frontier advances multiple times over in the same period. Traditional design workflows and generic LLMs struggle… Read More

WEBINAR: Creating A Hardware-Optimised Neural Rendering Solution

WEBINAR: Creating A Hardware-Optimised Neural Rendering Solution
by Admin on 09-21-2026 at 10:01 pm

AI is reshaping graphics, but achieving great results requires more than AI acceleration alone. In this session, we’ll explore how hardware and software can be co-designed to create more efficient neural rendering solutions.

Using Imagination’s new Neural Super Resolution as a practical example, we’ll show how we developed… Read More

WEBINAR: Porting, Analysing & Optimising AI Models onto Edge GPUs

WEBINAR: Porting, Analysing & Optimising AI Models onto Edge GPUs
by Admin on 09-21-2026 at 9:59 pm

Running AI models efficiently at the edge is about more than hardware TOPS. In this session, we’ll walk through the end-to-end process of porting, analysing and optimising modern AI models for edge GPUs, using Qwen 3.5 as a practical example. Learn how to take a model from framework to deployment, identify performance bottlenecks,… Read More

Webinar: LPO: Inside the First Standards-Compliant 112G Optical PHY

Webinar: LPO: Inside the First Standards-Compliant 112G Optical PHY
by Admin on 09-21-2026 at 9:27 pm

Featured Speaker:

Kant Deshpande, Architect, Technical Product Management, Synopsys

As AI/ML clusters scale toward 800G, 1.6T, and beyond, the optical DSP/retimer functions inside conventional transceivers (FRO) are becoming a significant bottleneck — adding power, latency, and cost to every link at a time when interconnects… Read More

Webinar: Testing Cars That Don’t Exist (Yet): Extending the Automotive Software Factory with Virtual ECUs

Webinar: Testing Cars That Don’t Exist (Yet): Extending the Automotive Software Factory with Virtual ECUs
by Admin on 09-17-2026 at 3:28 pm

Software factories have transformed automotive software development through automation, continuous integration, and rapid feedback cycles, yet achieving the same level of automation and continuous validation across the entire vehicle remains a major challenge. However, by creating complete virtual vehicles, engineering… Read More

Webinar: The Convergence of Edge Accelerators

Webinar: The Convergence of Edge Accelerators
by Admin on 09-16-2026 at 3:36 pm

*Company Email Required for Registration*

ABSTRACT

Neural rendering. Offloading overloaded NPUs. Protection against evolving AI models. Developer-friendly programming. Reduced system complexity. There are many reasons why edge AI systems benefit from a GPU that delivers fast, efficient and fully programmable AI acceleration.… Read More

September 10, 2026September 27, 2026

Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success

Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success
by Mike Gianfagna on 09-10-2026 at 2:00 pm
Categories: AI, EDA, Events, Semiconductor Services, Tuple Technologies

Studies have shown that nearly 20% of the verification cycle is spent on assertion generation, debugging, and methodology integration. This work remains largely manual today or is delegated to general-purpose LLMs that can produce incorrect assertions more than 30% of the time. Avestra attacks this problem with agentic AI … Read More

Webinar: The Ghost in the GDSII: AI’s New Role in Physical Design

Webinar: The Ghost in the GDSII: AI’s New Role in Physical Design
by Admin on 09-08-2026 at 11:27 pm

Every chip ends its journey as a GDSII file — millions of polygons handed to the foundry. But hidden inside today’s layouts is a new kind of intelligence. AI is quietly reshaping physical design: guiding floorplanning and placement, predicting congestion and timing before a single wire is routed, and autonomously tuning… Read More

Webinar: Introducing Ansys TPT, Embedded Software Testing

Webinar: Introducing Ansys TPT, Embedded Software Testing
by Admin on 09-04-2026 at 1:38 am

Discover how to transform your embedded software testing with Ansys TPT, reducing cost, improving quality, and accelerating validation across all test levels. You’ll also explore how TPT, combined with SCADE, enables a seamless, scalable design-to-test workflow for modern, safety-critical systems.

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