Webinar: Intel: Enabling and Evaluating Intel EMIB-T Bridging Design with Synopsys Tools

Webinar: Intel: Enabling and Evaluating Intel EMIB-T Bridging Design with Synopsys Tools
by Admin on 04-29-2026 at 12:31 am

In this webinar, Intel will present how EMIB-T (Embedded Multi-die Interconnect Bridge with TSVs) enables compact, cost-effective multi‑die design while sustaining the bandwidth and power efficiency required for AI and datacenter designs. Intel will share a production-oriented EMIB-T reference methodology built … Read More

Webinar: Cutting Full-Chip SoC Debug from Days to Minutes with AI

Webinar: Cutting Full-Chip SoC Debug from Days to Minutes with AI
by Admin on 04-25-2026 at 1:14 am

*Company Email Required for Registration*

Full-chip SoC debug has become one of the most expensive bottlenecks in modern verification. A single production issue can pull multiple engineers away days as they chase a failure through waveforms, logs, and across hundreds of thousands of lines of code.

In this webinar, we will demonstrate… Read More

Webinar: How Agentic AI Keeps Documentation Consistent and Accurate

Webinar: How Agentic AI Keeps Documentation Consistent and Accurate
by Admin on 04-25-2026 at 1:11 am

**Work Email Required for Registration**

Embedded systems programs rarely fail because any one team lacks capability. They fail because critical engineering artifacts drift out of alignment over time and distance.

This includes requirements, architecture, implementation, verification, hardware bring-up, firmware,… Read More

Webinar: RedHawk-SC: From EMIR Signoff to IR-Aware Design Closure

Webinar: RedHawk-SC: From EMIR Signoff to IR-Aware Design Closure
by Admin on 04-24-2026 at 2:38 am

As power integrity challenges increase with advanced nodes and multi-die architectures, EMIR analysis must evolve beyond traditional signoff. In this Synopsys webinar, we will show how RedHawk-SC is expanding its capabilities not only to enhance EMIR analysis, but also to enable IR-aware Static Timing Analysis (IR-STA) … Read More

Webinar: All in One Bluetooth Audio: A Complete Solution on a TSMC 12nm Single Die

Webinar: All in One Bluetooth Audio: A Complete Solution on a TSMC 12nm Single Die
by Admin on 04-20-2026 at 12:37 am

Abstract

Dive into the future of Bluetooth audio with Ceva and Dolphin Semiconductor’s breakthrough 12nm Smart Edge AIoT SoC solution.

This webinar shows how advanced wireless connectivity, integrated AI processing, and premium audio technologies and power management come together to deliver superior performance, lower

Webinar: How Manufacturing Complexity Increased, and Why Validation Had to Evolve

Webinar: How Manufacturing Complexity Increased, and Why Validation Had to Evolve
by Admin on 04-13-2026 at 11:30 pm

As semiconductor complexity increases and board designs become denser, manufacturing teams face tighter tolerances, reduced test access, and rising pressure to maintain yield and throughput. Validating RF performance and high-speed digital signal integrity at production scale adds a new layer of complexity that traditional… Read More

Webinar: How System Scale Expanded, and Why Network Traffic Validation Became Essential

Webinar: How System Scale Expanded, and Why Network Traffic Validation Became Essential
by Admin on 04-13-2026 at 11:30 pm

AI data center networks now operate at a scale where device-level validation no longer reflects real performance. Engineers must understand how systems behave under realistic traffic conditions, not just in isolated tests.

Join Ram Periakaruppan, vice president and general manager of network applications and security at… Read More

Webinar: How Frequency Ranges Expanded, and Why Measurement Fidelity Became Critical

Webinar: How Frequency Ranges Expanded, and Why Measurement Fidelity Became Critical
by Admin on 04-13-2026 at 11:29 pm

As systems move into higher frequencies and wider bandwidths, small measurement errors can lead to costly design decisions. Engineers working in wireless, radar, satellite, and optical domains must now validate signals that push existing tools to their limits.

Join Jun Chie, Vice President of Product Management at Keysight,… Read More

Webinar: How Data Rates Doubled, and Where Validation Reaches Its Limit

Webinar: How Data Rates Doubled, and Where Validation Reaches Its Limit
by Admin on 04-13-2026 at 11:27 pm

Data rates have doubled, but validation methods have not kept pace. As PCIe, DDR, and multi-terabit optical interconnects evolve, engineers are encountering signal integrity challenges much earlier in the design process.

Join Niels Fache, Senior Vice President and General Manager of Design Engineering Software at Keysight,… Read More

Webinar: HDI Design Workflow: From Decisions to Fabrication

Webinar: HDI Design Workflow: From Decisions to Fabrication
by Admin on 04-13-2026 at 11:25 pm

Ensure fabrication success with proven HDI design techniques and real-world tools.

Overview:

As AI accelerators and edge compute modules push PCB densities to their physical limits, HDI design has become the defining skill separating production-ready boards from layouts that fail at fabrication. This webinar walks through