Three years ago my youngest son purchased a $17 smart watch on eBay, but then my oldest son read an article warning about how that watch would sync with your phone, then send all of your contact info to an address in China. My youngest son then wisely turned the watch off, and never used it again. Hackers have been able to spoof and hide … Read More
ClioSoft has been working with the leading cloud computing providers running experiments on various EDA cloud architectures for a while now. One example of that was a project with Google I previously wrote a blog about, For EDA Users: The Cloud Should Not Be Just a Compute Farm. Since then, ClioSoft has also teamed up with Amazon … Read More
In September, ClioSoft gave a SemiWiki webinar titled, Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®. I was happy to be the moderator of this webinar, having had the chance to work with ClioSoft’s team over many years. The webinar was informative while also being very time efficient. I think it is important for… Read More
Complex algorithms do not exist in a vacuum. After HLS is used to create an RTL component, to be useful, it needs to be integrated into a larger system. This means connecting it to other components, a processor, and even software. Once integrated, the system needs to be verified. The verification of the complete environment… Read More
FPGAs have always been a great way to add performance to a system. They are capable of parallel processing and have the added bonus of reprogramability. Achronix has helped boost their utility by offering on-chip embedded FPGA fabric for integration into SoCs. This has had the effect of boosting data rates through these systems… Read More
Neural networks are typically developed and trained in a high-performance 32-bit floating-point compute environment. But, in many cases a custom hardware solution is needed for the inference engine to meet power and real-time requirements. Each neural network and end-application may have different performance… Read More
Debugging an IC is never much fun because of all the file formats used, the levels of hierarchy and just the sheer design size, so when an EDA tool comes around that allows me to get my debugging done quicker, then I take notice and give it a look. I was already familiar with debugging SPICE netlists using a tool called SPICEVision Pro,… Read More
HLS has been used in multiple companies, projects, and designs targeting vision processing for the past several years. HLS adoption continues to grow because it is the fastest way to turn complex algorithms into efficient hardware implementations. HLS creates a methodology that enables design teams to rapidly react… Read More
Performance: Every engineer wants more. In this seminar we will look at using Questa vopt flow to gain raw simulator performance. We will also look at how Questa Visualizer brings performance through debug efficiency. Finally we will see how working together, these tools can… Read More
The VX.2.6 release for Xpedition Enterprise brings a significant update to the core PCB design flow, as well as cross-domain integrations with other Siemens technologies. This session will talk about specific improvements in design capture, layout, data management, and design validation. It will also cover functionality… Read More
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TSMC Q4 2019 “2020 Bellwether” Conference Call Summary