Mark Twain remarked that everyone talks about the weather but nobody does anything about it. 3D ICs seems to be a bit like that. Over the last couple of years there have been lots of people talking about 3D but very little that has actually been manufactured. In addition to the weather, everyone talks about Xilinx’s 3D Virtex… Read More
Hardware is the Center of the Universe (Again)The 40-Year Evolution of Hardware-Assisted Verification — From…Read More
Smarter ECOs: Inside Easy-Logic’s ASIC Optimization EngineEasy-Logic Technology Ltd. is a specialized Electronic Design…Read More
The Name Changes but the Vision Remains the Same – ESD Alliance Through the YearsThe Electronic System Design Alliance (ESDA) has been…Read More
TSMC Process Simplification for Advanced NodesIn the modern world, the semiconductor industry stands…Read More
CEO Interview with Juniyali Nauriyal of PhotonectJuniyali Nauriyal is the CEO and Co-Founder of…Read MoreFast SPICE from Kiev at DAC
Monday at DAC I met with an EDA start-up called Symica based in Kiev. Ian Tsybulkin, CEO met with me to give an overview of their tools.… Read More
A DAC Update from Mentor Graphics on IC Layout and Circuit Simulation Tools
Linda Fosler, Tom Daspit and Mitch from Mentor Graphics met with me last Monday at DAC to provide an update on IC layout and circuit simulation tools. My notes follow:
Overview – Pyxis for Schematic and Layout, IC Station is re-branded as Pyxis. (Pyxis schematic is still Falcon, Ample language is still used.)… Read More
ST using Cadence IC Tools with Module Generators
Cadence invited Francois Lemery of ST Microelectronics to speak at a luncheon last Monday at DAC about designing for the 20nm node using module generators. Here are my trip report notes:
TSMC 28nm is Fabulous! TSM Stock is not so Fabulous!
What a great interview! Xilinx CEO Moshe Gavrielov is right on the money HERE where he credits the high 28nm yields to the “very intimate” linkage in process development with TSMC.… Read More
The Apple and VMWare Alliance Threatens Microsoft (and Fabless ARM Camp)
The speed with which The Mobile Tsunami engulfs the old PC Market is just incredible. 18 months ago the tablet and smartphone markets were considered a Green Field of Opportunity for PC OEMs and chip suppliers to graze in for the next decade. The fences, however, are closing in fast as Apple continues to drive its iOS empire into new… Read More
Press at DAC
The way that the press that covers EDA has changed in the last few years is quite dramatic. Semiwiki is, of course, part of that change. The official press is less and less relevant and bloggers and newsletters are more and more important.… Read More
DAC Attendance up
Attendance at DAC is up across the board. Not surprisingly, with San Francisco being so close to silicon valley, the biggest increase was in people coming to see the exhibits.… Read More
Schematic, IC Layout, Clock and Timing Closure from ICScape
Before this DAC I had never even heard of ICScape, so on Monday and Wednesday I visited their booth to find out their story.
Steve Yang, Ph.D. (Co-founder and President), Ravi Ravikumar (Marketing)
ICScape was founded in 2005 in Santa Clara by Steve Yang (Circuit Design engineer for microprocessor, Synopsys) and Jason Xing (Sun… Read More
Fast Monte Carlo and Analog Fast SPICE
Britto Vincent of ProPlus Design Solutions met with me at DAC on Monday morning to talk about Design For Yield (DFY) and Analog Fast SPICE.
In 2011 ProPlus announced DFY tools where the technology came from IBM, it provides fast Monte Carlo results up to 3 sigma, then added NanoSpice for faster simulation results. Similar in approach… Read More


CEO Interview with Aftkhar Aslam of yieldWerx