At advanced process nodes, variation and its effects on the design become a huge challenge. Join Cadence® Virtuoso® experts for a series of technical webinars on variation-aware design. Learn how to use advanced technologies and tools to analyze and understand the affects of variation. We’ll introduce you to the latest Virtuoso… Read More
Captain America: Can Elon Musk Save America's Chip Manufacturing Industry?Intel has posted three consecutive years of falling…Read More
WEBINAR: Reclaiming Clock Margin at 3nm and BelowAt 3nm and below, clock networks have quietly…Read More
WEBINAR: HBM4E Advances Bandwidth Performance for AI TrainingThe rapid proliferation of LLMs and other AI…Read More
Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design EnablementThe recent Chiplet Summit in Santa Clara was…Read More
Siemens Fuse EDA AI Agent Releases to Orchestrate Agentic Semiconductor and PCB DesignThough terminology sometimes get fuzzy, consensus holds that…Read MoreSilicon-Accurate Mixed-Signal Fractional-N PLL IP Design Paper
Silicon Creations will be presenting a paper with Berkeley Design Automation at the TSMC Open Innovation Platform (OIP) Ecosystem Forum next week where TSMC’s design ecosystem member companies and customers share real-case solutions for design challenges within TSMC’s design ecosystem:
This presentation will describe … Read More
Dear Meg, HP is Still a Goner
A year ago, Meg Whitman decided it was time to venture back into the business world by grabbing onto the HP CEO baton from a badly wounded Leo Apotheker. What for? My best guess is to enter the Pantheon of Great Turnaround CEOs of failing companies, best exemplified by the work of Lou Gerstner with IBM in the early 1990s. It comes too late… Read More
Altera’s Use of Virtual Platforms
Altera have been making use of Synopsys’s virtual platform technology to accelerate the time to volume by letting software development proceed in parallel with semiconductor development so that the software development does not need to wait until availability of hardware.
In the past, creating the virtual platform … Read More
A Brief History of Moore’s Law
I recently read a news article where the author referred to Moore’s Law as a ‘Law of Science discovered by an Intel engineer’. Readers of SemiWiki would call that Dilbertesque. Gordon Moore was Director of R&D at Fairchild Semiconductor in 1965 when he published his now-famous paper on integrated electronic… Read More
The Protocol Processing Dataplane
At the Linley processor conference this week, Chris Rowen, the CTO of Tensilica presented on the protocol processing dataplane. That sounds superficially like he is talking about networking but in fact true protocol processing is just part of adding powerful compute features to the dataplane. Other applications are video, … Read More
ARM in Networking/Communications
I was at the Linley Processor Conference yesterday. There are two of these each year, one focused on mobile and this one, focused on networking and communications (so routers, base-stations and the like). You probably know that ARM is pretty dominant in mobile handsets (and Intel is trying to get a toe-hold although I’m skeptical… Read More
Challenges in Managing Power Consumption of Mobile SoC Chipsets: And What Lies Ahead When Your Hand-Held Is Your Compute Device!
Qualcomm VP of Engineering, Charlie Matar, will be keynoting the Apache/ANSYS seminar in Santa Clara next Thursday. Charlie is a great guy and a great speaker so you won’t want to miss this and it’s FREE! I spoke to Charlie, he will be speaking on:
Today’s complex SOC design is driven by the constant demand for high performance… Read More
Hynix View on New, Emerging Memories
The recent (August) flash memory summit in Santa Clara had a session devoted to ReRAM as well as featuring prominently in the keynote address by Sung Wook Park of SK Hynix. The talk includes a summary of NAND’s well known scaling issues along with approaches to 3D NAND. It turns out that they are working on three different technologies:… Read More
Tensilica Ships 2 Billionth Core
It was in June of last year that Tensilica announced that they (or rather their licensees) had shipped one billion cores. Now they have just announced that they have shipped two billion cores. They are shipping at a run-rate of 800 million cores per year, which is 50% higher than June last year. If business continues to grow they will… Read More


Chemical Origins of Environmental Modifications to MOR Lithographic Chemistry