Feed Forward Intelligence: Enabling Testability in the Chiplets EraThe semiconductor industry is entering a new era…Read More
Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions Market Leaders Including Cisco,…Read More
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PowerArtist RTL Power Estimation Folds into KeysightBack in the late 1990s, Sente launched a…Read More
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As I wrote about last month, this weekend is the Maker Faire in San Mateo. If you are interested in the cutting edge of what people are getting up to outside of the corporate world, this is the place to go. You will see stuff that you will not hear about for a year or two when it finally goes mainstream.
Increasingly, there is a lot of electronics… Read More
Register to hear industry experts from top semiconductor companies share their best practices that enable the next generation of high-performance, low power designs for mobile, automotive and other applications. Meet our technologists for in-depth presentations, case studies and demos on the industry’s leading simulation… Read More
Accelerating Innovation—that has been at the heart of Synopsys’ commitment to its customers for more than 25 years. As a leader in EDA and semiconductor IP, Synopsys’ software, IP and services help engineers address their design, verification, system and manufacturing challenges and accelerate their innovations. Since 1986,… Read More
This is probably one of the biggest stories we will cover this month, if not this year, absolutely. In partnership with STMicroelectronics, Samsung will manufacture 28nm FD-SOI chips for the fabless semiconductor community starting now. This proves without a shadow of a doubt that Samsung is serious about the foundry business.… Read More
Cadence is excited to bring a full slate of demos, technical presentations, papers, and more to the Design Automation Conference (DAC) June 1-5, 2014, in San Francisco, CA. From our technical experts, you’ll learn tips and techniques from areas including low power, mixed signal, advanced nodes, signoff, verification, and IP,… Read More
With the advent of large SoCs in semiconductor design space, verification of SoCs has become extremely challenging; no single approach works. And when the size of an SoC can grow to billions of gates, the traditional methods of testability of chips may no longer remain viable considering the needs of large ATPG, memory footprint,… Read More
I’m typing this blog today with my trusty Apple MacBook Pro – a 17″ laptop with matte display and 16GB of RAM, but don’t stereotype me as an Apple fanboy because I also own the fantastic Samsung Galaxy Note II phone (aka phablet). Some industry pundits would have us believe that desktops and laptops are going… Read More
In 2002, MunEDA was launched under the guidance of EDA academic veterans and IEEE fellows Prof. Kurt Antreich and Prof. Helmut Gräb (TUM Munich Technical University ) which represented 20 plus years of EDA research and experience. All MunEDA tools are combined in a tool suite called WiCkeD[SUP]TM[/SUP]. The tool suite brand was… Read More
In the dim and distant past, if you wanted to learn how to use a particular EDA tool then you would go on a training course. This would often be multiple days and often a significant dollar investment too. For most EDA companies, that option still exists and the big 3 have quite extensive training catalogs.
But nowadays it is often easier… Read More
This is patent number twelve for Solido Design Automation THE leading provider of variation analysis and design software for high yield and performance IP and system-on-chip (SOCs). Additional patents are pending on high-sigma analysis, high-dimensional data mining, and other technologies to design and verify custom integrated… Read More
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Available Is Not In Control: Balancing Output, Quality, and Risk in High-Volume Fabs