The Yield Partnership: Intel and PDF Solutions Tackle Advanced NodesOne of the most difficult things to do…Read More
Webinar: Faster Design Spec to Implementation using IP-XACTAs SoC design flows grow increasingly complex, IP-XACT…Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too LateI recently posted an overview of an upcoming…Read More
Feed Forward Intelligence: Enabling Testability in the Chiplets EraThe semiconductor industry is entering a new era…Read More
Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions Market Leaders Including Cisco,…Read More
The keynote on Tuesday at DAC was by Jeffrey Owens of Delphi. For those of you that don’t know, Delphi used to be the part of General Motors dealing with electronics spun out from GM as a separate company in 1999.
Jeffrey pointed out that a modern automobile is the most complex device any of us own, with over 100M lines of code (loc)… Read More
There were two keynotes at DAC this morning. I think the official designation of the first one was a “visionary talk” and the main difference was that it was only 15 minutes long. Vivek Singh, an Intel fellow, talked about Moore’s Law at 50: No End in Sight.
He started with a graph showing transistor speed versus… Read More
On Sunday night at DAC this week I sat in the front row and listened to Gary Smith give his predictions about EDA and IP as an industry. His financial forecast was a $6.8B industry in 2015, growing to $9B in 2019. An ideal company for Wall Street to invest in would have slow and steady growth. If you add semiconductor IP into the forecast… Read More
Today’s DAC keynote was by Brian Otis of Google about their project, working with Novartis, to build disposable contact lenses that perform continuous glucose monitoring.
Why is this important? There are 382M people around the world with diabetes who typically have to check their blood glucose levels four times a day. … Read More
A week ago I was reading an article written by Daniel Nenni where he emphasised about semiconductor acquisitions to fuel innovation. We would see that in a larger space, not only in semiconductor and FPGA manufacturing companies (e.g. Intel and Altera) but also in the whole semiconductor ecosystem. If we see it from technical perspective,… Read More
If you really want to know why I write about TSMC it is all about ego, my massive ego, absolutely. Blogs about TSMC and the foundries have always driven the most traffic and they most likely always will. Semiconductor IP is second, Semiconductor Design is third, and I don’t think that is going to change anytime soon:
SemiWiki BI: Daniel… Read More
With growing complexities and sizes of SoCs, verification has become a key challenge for design closure. There isn’t a single methodology that can provide complete verification closure for an SoC. Moreover creation of verification environment including hardware, software, testbench and testcases requires significant … Read More
I was at the DAC kickoff this evening in the Intercontinental Hotel. I was talking to Dave DeMaria, the senior marketing guy at Synopsys and he told me of a couple of minor press releases due to hit the wire tomorrow morning, didn’t sound important enough to be blogworthy. Aart was there too although I didn’t speak to him.… Read More
When the RISC movement surfaced in 1982, researchers analyzed UNIX to discover what instructions multi-user code was actually using, and then designed an instruction set and execution pipeline to do that better. Fewer instructions meant fewer transistors, which led to less power consumption – although in the original… Read More
Most of us drive automobiles and have a vague idea that the development of our cars takes many years, millions of dollars, is a proprietary process and require huge factories to produce. A relatively new company called Local Motors founded in 2007 has started to turn the automotive development process upside down because they do… Read More
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Available Is Not In Control: Balancing Output, Quality, and Risk in High-Volume Fabs