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Autonomous Cars Reality is Stranger than Fiction

Autonomous Cars Reality is Stranger than Fiction
by Roger C. Lanctot on 05-10-2020 at 10:00 am

Autonomous Cars Reality is Stranger than Fiction

For tech-sensitive viewers of streaming content it is becoming increasingly difficult to avoid the appearance of autonomous vehicles in serialized television programs. Amazon’s “Upload” and HBO’s “Westworld” are two such examples.

Described as a comedy (with elements of a thriller) “Upload” makes gratuitous use of autonomous… Read More


MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages

MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages
by Fred Chen on 05-10-2020 at 6:00 am

MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages

As transistor dimensions shrink to follow Moore’s Law, the functionality of the gate used to switch on or off the current is actually being degraded by the short channel effect (SCE) [1-5]. Moreover, the simultaneous reduction of voltage aggravates the degradation, as will be discussed below.

A Practical Lower Limit ofRead More


Flex Logix CEO Update 2020

Flex Logix CEO Update 2020
by Daniel Nenni on 05-08-2020 at 10:00 am

FlexLogic Color AI eFPGA

We started working with Felx Logix more than eight years ago and let me tell you it has been an interesting journey. Geoff Tate was our second CEO Interview so this is a follow up to that. The first one garnered more than 15,000 views and I expect more this time given the continued success of Flex Logix pioneering the eFPGA market, absolutely.… Read More


How to Modify, Release and Update IP in 30 Minutes or Less

How to Modify, Release and Update IP in 30 Minutes or Less
by Mike Gianfagna on 05-08-2020 at 6:00 am

Screen Shot 2020 04 23 at 6.39.05 PM

I had the opportunity to attend a ClioSoft webinar recently on the topic of IP traceability. ClioSoft provides a broad range of tools for design data management and IP reuse. Entitled The New Trend in IP Traceability that IP Developers and Design Managers Rely On, the webinar was presented by Karim Khalfan, director of applications… Read More


High-Level Synthesis and Open Source Software Algorithms

High-Level Synthesis and Open Source Software Algorithms
by Daniel Payne on 05-07-2020 at 10:00 am

hls flow min

The DVCon conference and exhibition finished up in California just as the impact of the COVID-19 pandemic was ramping up in March, but at least they finished the conference by altering the schedule a bit. Umesh Sisodia, CEO at CircuitSutra Technologies presented at DVCON on the topic, Using High-Level Synthesis to Migrate OpenRead More


Ultra-Low Power Inference at the Extreme Edge

Ultra-Low Power Inference at the Extreme Edge
by Bernard Murphy on 05-07-2020 at 6:00 am

Intelligent IoT

I wrote last year about Eta Compute and their continuously tuned dynamic voltage-frequency scaling (CVFS). That piece was mostly about the how and why of the technology, that in self-timed circuits (a core technology for Eta Compute) it is possible to continuously vary voltage and frequency, whereas in conventional synchronous… Read More


Tech Shows up for COVID-19: Time to Expand Horizons

Tech Shows up for COVID-19: Time to Expand Horizons
by Terry Daly on 05-06-2020 at 10:00 am

Covid Tech 2020

Bring digital technology solutions to bear on more of our toughest societal problems 

“We are all in this together”. The world faces 250,000 COVID-19 deaths, each a tragic human story. The pandemic will bring a litany of “lessons learned” including lack of preparedness, slow response and uneven recovery. The rapid… Read More


Reliable Line Cutting for Spacer-based Patterning

Reliable Line Cutting for Spacer-based Patterning
by Fred Chen on 05-06-2020 at 6:00 am

Reliable Line Cutting for Spacer based Patterning

Spacer-defined patterning is an expected requirement for advanced semiconductor patterning nodes with feature sizes of 25 nm or less. As the required gaps between features go well below the lithography tool’s resolution limit, the use of cut exposures to separate features is used more often, especially in chips produced… Read More


DFT Innovations Come from Customer Partnerships

DFT Innovations Come from Customer Partnerships
by Tom Simon on 05-05-2020 at 10:00 am

Mentro Tessent Innovation

There is an adage that says that quality is not something that can be slapped on at the end of the design or manufacturing process. Ensuring quality requires careful thought throughout development and production. Arguably this adage is more applicable to the topic of Design for Test (DFT) than almost any other area of IC development… Read More


Accellera Tackles Functional Safety, Mixed-Signal

Accellera Tackles Functional Safety, Mixed-Signal
by Bernard Murphy on 05-05-2020 at 6:00 am

Accellera

I managed a few meetings at DVCon this year in spite of the Coronavirus problems. One of these was with Lu Dai Chairman of Accellera. I generally meet with Lu each year to get an update on where they are headed, and he had some interesting new topics to share.

Membership and headcount remain pretty stable. Any changes (at the associate… Read More