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Webinar: Reduce Gate-level Simulation Bring-up Time with Semi-formal X Verification

March 27 @ 10:00 AM - 11:00 AM

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Gate-level simulations (GLS) are a crucial step in the verification of an ASIC/FPGA. GLS is used for verifying power-up, reset operation, timing, multi-cycle paths, and power estimation. However, GLS can be a bottleneck in the project cycle due to its complexity. The nature of a GLS can cause simulations to run much longer than the equivalent RTL simulations. Additionally, GLS bring-up and debug is slow and manual. In GLS, engineers spend time cleaning up sources of unknowns (Xs).  Xs can be caused by uninitialized inputs, registers, and simulation artifacts such as X-pessimism. Ad-hoc methods to handle Xs in GLS could mask problems.

This webinar will describe a reliable formal-based method to manage Xs in GLS.  It centers on the use of Siemens Avery SimXACT solution alongside your preferred simulator.

What You Will Learn: 

  • X mitigation techniques to use in RTL
  • How to eliminate X-pessimism in GLS for a streamlined bring-up
  • Generate fixes for unknowns in a fraction of time compared to manual debug
  • The SimXACT workflow

Who Should Attend: 

  • Designers and Design Verification engineers
  • Design Managers and Directors responsible for project tapeout schedule

What/Which Products are Covered:  

  • Siemens Avery SimXACT
  • Questa simulation


Rick Koster

Rick Koster

Low Power Specialist, Siemens EDA

Rick Koster is the North America Low Power Specialist for verification tools at Siemens EDA.  Rick started his career at Texas Instruments and has held engineering positions at the US Army, Bytex Corporation.  For more than 25 years, Rick has worked in verification at Siemens EDA through Mentor Graphics and Ikos Systems.

Kai-hui Chang

Kai-hui Chang

Siemens EDA

Kai-hui Chang is the architect of the SimXACT tool. He has been with Avery Design Systems for 20 years and recently joined Siemens through the Avery acquisition. His work focuses on simulation technologies and formal verification. He has a Ph. D. in computer science and engineering from the University of Michigan, Ann Arbor.


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