Loading Events

« All Events

  • This event has passed.

Solido Lunch and Learn Seminar: Variation-Aware Verification and Library Characterization Powered by Machine Learning

July 30 @ 11:00 am - 2:30 pm

Overview

The ever-demanding and expanding applications in automotive, high-performance computing, mobile, and IoT are the driving force behind the increasing complexity of today’s semiconductor designs. Because of this, design and verification methodologies that were “good enough” in the past, are no longer adequate to service the requirements and meet specifications.

Most existing methodologies fall short when it comes to accuracy and coverage requirements, leading to over-margining, suboptimal power, performance and area metrics, yield challenges, and silicon failures. However, advancements in machine learning methods have resulted in disruptive improvements in this field, allowing orders of magnitude higher accuracy and coverage than what was previously achievable, with the same compute resources and runtime.

Two technology areas that have benefited drastically from these improvements  are:

  1. Variation-Aware Design & Verification
  2. Library Characterization & Validation

Machine learning techniques can significantly improve variation-aware design and verification by delivering unprecedented speed, accuracy, and robust variation coverage necessary for nanometer-scale designs. This enables designers to produce high-performance designs with a competitive advantage in the market.  This is achieved for critical tasks that include high-sigma verification, and addressing problems that arise from the interaction between the environmental conditions and the inherent statistical variation, all using brute-force SPICE-level accuracy with orders-of-magnitude fewer simulations.

For library characterization and validation, these techniques can significantly reduce standard cell, custom cell and memory characterization time and resources. Delivering production-accurate Liberty models and statistical data, in addition to performing comprehensive validation for characterized Liberty files. This is achieved by adaptively modeling the full characterization space and boosting accuracy where needed to achieve production targets, while greatly reducing simulation time in other areas.

In this seminar we will explore machine learning trends and applications for semiconductor design and verification, as well as Mentor’s solutions that utilize these methodologies with an in-depth introduction to Mentor’s Solido Variation Designer and ML Characterization Suite products and how they uniquely address today’s critical design and verification issues. The seminar will also feature case studies from design teams, their experiences using Solido Variation Designer and ML Characterization Suite, and the results they achieved.

What You Will Learn

  • Machine learning trends, applications, and Mentor’s roadmap
  • Variation-aware design and verification with Solido Variation Designer
  • Library characterization and validation with Solido ML Characterization Suite
  • Case studies on methodology, results, and best practices

 

Who Should Attend

  • Analog, RF and Mixed Signal designers
  • Design managers that deliver analog, RF and Mixed Signal IPs
  • Library design and characterization teams
  • Digital implementation teams interested in library re-characterization and validation
  • Analog, RF and Mixed Signal verification engineers