Webinar: Ansys on Multi-Physics PDN Optimization for 16/7nm

On the off-chance you missed my previous pieces on this topic, at these dimensions conventional margin-based analysis becomes unreasonably pessimistic and it is necessary to analyze multiple dimensions together. People who build aircraft engines, turbines and other complex systems have known this for quite a long time. You can’t analyze fluid dynamics, temperature and mechanical factors separately against margins on the other factors, at least not if you to want to build competitive solutions.

REGISTER NOW for this webinar at 8:00am PDT on August 3rd

Guess what – we now have a similar problem; important dimensions for semiconductor design are somewhat different but, at 16nm and below, just as multi-faceted, as design teams are already finding in significant deltas between margin-based analyses and multi-physics analyses. The margin-based approach analyzes timing, for example, with margins on operating voltage. But increased power-noise sensitivity as operating voltages get closer to threshold voltage (as they do in these advanced technologies) can cause nominally safe critical paths to fail both thanks to increased path-delay and clock jitter.

Margining this away becomes impractical – why should the whole PDN pay for one unusually large power dip in one use-case in one part of the circuit? Conversely, how do you know you didn’t miss that power dip in one otherwise unremarkable simulation while building your margins?

Ansys will talk about their SeaScape-based approach through big data analytics and elastic compute technology to enable multi-physics analysis and solve this problem the right way. Big data and elastic compute is an emerging wave in design. You might want to check it out.

REGISTER NOW for this webinar at 8:00am PDT on August 3rd

Ansys Summary
Next-generation automotive, mobile and high-performance computing systems demand the use of 16/7nm SoCs that are bigger, faster and more complex than ever. For these SoCs, the margins are smaller, schedules are tighter and costs are higher. Faster convergence with exhaustive coverage is imperative for on-time silicon success. The growing interdepencies among various multiphysics attributes such as timing, power and thermal properties in N16/N7 designs poses significant challenges for design closure. Existing solutions are not architected to solve for such a multidimensional optimization problem.

Join us for this webinar to learn how to maximize design coverage and accelerate convergence for SoC power signoff using the latest ANSYS SeaScape platform in big data systems. With unparalleled scalability across hundreds of cores using big data techniques, SeaScape helps you sign off on 1 billion+ instance designs within a few hours on commodity hardware. You will also learn how you can leverage multivariable analytics to achieve significantly better signoff confidence and drive meaningful design optimization.