Gary Smith has been talking about how the electronic system level (ESL) is where the future of EDA lies as design teams move up to higher levels encompassing IP blocks, high level synthesis, software development using virtual platforms and so on. At DAC this year in Austin he talked about how the fact that EDA controls the modeling process for semiconductors is the secret sauce that should allow EDA to start to move up into the embedded software space and start to improve their productivity in the same way as semiconductor design has improved over the last few decades.
I don’t think that the transition to ESL took place how we expected, nor did it take place as early as we expected. I worked for two virtual platform software development companies in the last decade, and Gary himself was famous for calling the move up to ESL in a big way as imminent several times before it really happened.
I think most of us expected that high-level synthesis (HLS) from C/C++/SystemC would take over from RTL synthesis and originally that was what people envisaged when you talked about ESL. Although HLS is indeed growing, and it has certain niches such as video processing where it is very strong, it turned out that for most SoC design, IP-based design was the way that we moved up a level. Many chips today contain very little “original” RTL, consisting largely of lots of IP blocks connected up using a network-on-chip (Noc), itself a form of IP.
Up another level from the IP blocks is the software component of a modern system. For many designs, this is a huge proportion of the entire design effort, often dwarfing the semiconductor design. Software is also longer lived. Any particular system, such as a smartphone, will go through many iterations of the underlying hardware, in this case what we call the application processor, while much of the software will be inherited from iteration to iteration. iOS, Android and their Apps have obviously continued to develop, but large amounts of code from several generations back are still shipped with each phone.
In fact there is a view that the only purpose of the application processor SoC is to run the software efficiently, fast enough and without consuming too much power. In this view, the specification of the design is almost all software to be run on a microprocessor such as an ARM. Only when that is either too slow or, more likely, consumes too much power, is specialized hardware used, either by creating a custom block or by using a customizable specialized processor such as CEVA, Tensilica or ARC that can offload the main microprocessor and implement special functions such as wireless modem processing, video encoding/decoding and so on, at a much superior PPA point.
On Monday August 19th from 11am to 11.45am Gary will be presenting a webinar entitled ESL—are you ready? along with Jason Andrews and Frank Schirrmeister from Cadence and Mike Gianfagna from Atrenta.
The ESL flow has been evolving and Gary believes that there have been significant breakthroughs that now mean that the ESL flow is real. Gary will review these breakthroughs and go into details of what today’s ESL tools look like and what it is capable off. “Vendors will be named and ESL heroes will be recognized.”
Registration for the webinar is here.