All Things Semiconductor!
I talked to John Lee (GM of the ANSYS Semiconductor BU) recently about his views on market trends and the ANSYS big-picture theme for DAC 2018. He set the stage by saying he really liked Wally’s view on trends (see my blog on Wally’s keynote at U2U). John said these confirm what he is seeing – a trend to specialization, some around… Read More
With the advent of SoCs, design abstractions and verification has moved up at the system level. It’s imperative that EDA moves up the value chain to start design automation at system level. The System Design Automation will be the new face of EDA in coming years.… Read More
John Koeter is in charge of marketing Synopsys’ IP and prototyping solutions. I talked to him last week.
He grew up in upstate New York, son of a Scottish mother and a Dutch father who immigrated to the US, so he is first generation American, unlike everyone else I’ve interviewed so far for this series who were born overseas.… Read More
As we celebrate the 50[SUP]th[/SUP] anniversary of the publication of Moore’s Law in Electronics Magazine (April 19, 1965), the industry finds itself in an increasingly costly global effort to keep transistor scaling on track. “Is Moore’s Law dead?” is a common question these days.
But practically speaking the doubling of transistor… Read More
Next week Mike Jensen of Mentor will present a webinar Improving Complex System Design Reliability and Robustness. The webinar will be presented live twice and presumably available for replay soon after, as is usually the case:
The growing capabilities of silicon along with improved algorithms means that machine vision is becoming increasingly important since more and more systems can be built in such areas as manufacturing, intelligent traffic management, bar code scanning, counterfeit detection and even sports simulation. Is that a 3X driver?… Read More
According to Steven Hawking, Bertrand Russell once gave a public lecture on astronomy. He described how the earth orbits around the sun and how the sun orbits around our galaxy. At the end of the lecture, a little old lady at the back of the room got up and said: “What you have told us is rubbish. The world is really a flat plate supported… Read More
Gary Smith has been talking about how the electronic system level (ESL) is where the future of EDA lies as design teams move up to higher levels encompassing IP blocks, high level synthesis, software development using virtual platforms and so on. At DAC this year in Austin he talked about how the fact that EDA controls the modeling… Read More
There are two main approaches to building a substructure on which to do software development and architectural analysis before a chip is ready: virtual platforms and FPGA prototyping.
Virtual platforms have the advantage that they are fairly quick to produce and can be created a long time before RTL design for the various blocks… Read More
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Flexible, Multiprotocol IO’s in 7nm FinFets
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Taiwan ESD Workshop Recording
Reduce Risk and Improve Quality of AMS IP’s using AI-Powered Automated Timing Arc Prediction
Finding Your Way Through Verification (Text)
REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation
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Desinging Complex SoCs and Dealing with Multiple File Formats?
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